Merge pull request #3829 from YossiYad/carry/agc-vieBRwlh1Lw
feat(libSceAgc): implement the vieBRwlh1Lw interpolant mapping update
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Adrià
GitHub
commit
6dbc0ea66a
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@ -53,10 +53,21 @@ std::uint32_t CreateInterpolantValueSplitF16(std::uint32_t psWord, const ShaderS
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: CreateInterpolantValue(psWord, gsSemantic);
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}
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int CreateInterpolantMapping(const char* fn, ShaderRegister* regs, const Shader* gs, const Shader* ps, CreateInterpolantValueFn createValue) {
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std::uint32_t UpdateInterpolantValue(std::uint32_t psWord, const ShaderSemantic* gsSemantic) {
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const std::uint32_t f16 = (psWord >> 20u) & 0x3u;
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if (f16 != 0 && f16 != InterpolantF16HiOnly && ((psWord >> 28u) & 0x3u) != ((psWord >> 30u) & 0x3u)) {
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throw std::runtime_error(std::string(__func__) + ": DEFAULT_VAL of an f16 input with different low and high defaults is unknown");
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}
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return CreateInterpolantValueSplitF16(psWord, gsSemantic);
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}
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int CreateInterpolantMapping(const char* fn, ShaderRegister* regs, const Shader* gs, const Shader* ps, CreateInterpolantValueFn createValue, bool fillIdentityTail) {
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if (regs == nullptr) {
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throw std::runtime_error(std::string(fn) + ": regs is null");
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}
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if (ps == nullptr && !fillIdentityTail) {
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throw std::runtime_error(std::string(fn) + ": ps is null");
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}
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if (ps != nullptr && ps->num_input_semantics > 32) {
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throw std::runtime_error(std::string(fn) + ": input semantic count exceeds 32");
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}
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@ -66,13 +77,14 @@ int CreateInterpolantMapping(const char* fn, ShaderRegister* regs, const Shader*
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auto* output = regs;
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regs = values.data();
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if (ps == nullptr || ps->num_input_semantics == 0) {
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FillIdentityInterpolants(regs, 0);
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const std::uint32_t count = fillIdentityTail ? InterpolantRegisterCount : 0;
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if (fillIdentityTail) FillIdentityInterpolants(regs, 0);
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if (ps != nullptr) {
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AgcDriverResolveShaderAbi_nid_postfix(ps, {regs, 32}, {});
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AgcDriverResolveShaderAbi_nid_postfix(ps, {regs, count}, {});
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if (gs != nullptr) AgcDriverResolveGraphicsAbi_nid_postfix(gs, ps, 0);
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}
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transaction.Commit();
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std::copy(values.begin(), values.end(), output);
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std::copy_n(values.begin(), count, output);
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return 0;
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}
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@ -98,11 +110,12 @@ int CreateInterpolantMapping(const char* fn, ShaderRegister* regs, const Shader*
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SetInterpolantRegister(regs, i, createValue(ShaderSemanticWord(psSemantic), gsSemantic));
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}
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FillIdentityInterpolants(regs, ps->num_input_semantics);
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AgcDriverResolveShaderAbi_nid_postfix(ps, {regs, 32}, {});
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const std::uint32_t count = fillIdentityTail ? InterpolantRegisterCount : ps->num_input_semantics;
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if (fillIdentityTail) FillIdentityInterpolants(regs, ps->num_input_semantics);
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AgcDriverResolveShaderAbi_nid_postfix(ps, {regs, count}, {});
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AgcDriverResolveGraphicsAbi_nid_postfix(gs, ps, 0);
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transaction.Commit();
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std::copy(values.begin(), values.end(), output);
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std::copy_n(values.begin(), count, output);
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return 0;
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}
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@ -111,12 +124,17 @@ int CreateInterpolantMapping(const char* fn, ShaderRegister* regs, const Shader*
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extern "C" {
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int APS5_VABI sceAgcCreateInterpolantMapping_0100(ShaderRegister* regs, const Shader* gs, const Shader* ps) {
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return CreateInterpolantMapping(__func__, regs, gs, ps, CreateInterpolantValue);
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return CreateInterpolantMapping(__func__, regs, gs, ps, CreateInterpolantValue, true);
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}
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APS5_EXPORT("dbOlWdppb4o", sceAgcUnknownCreateInterpolantMapping);
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int APS5_VABI sceAgcUnknownCreateInterpolantMapping(ShaderRegister* regs, const Shader* gs, const Shader* ps) {
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return CreateInterpolantMapping(__func__, regs, gs, ps, CreateInterpolantValueSplitF16);
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return CreateInterpolantMapping(__func__, regs, gs, ps, CreateInterpolantValueSplitF16, true);
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}
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APS5_EXPORT("vieBRwlh1Lw", sceAgcUnknown_vieBRwlh1Lw);
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int APS5_VABI sceAgcUnknown_vieBRwlh1Lw(ShaderRegister* regs, const Shader* gs, const Shader* ps) {
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return CreateInterpolantMapping(__func__, regs, gs, ps, UpdateInterpolantValue, false);
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}
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}
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@ -90,10 +90,4 @@ int APS5_VABI sceAgcGetShaderInstrumentation() {
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return 0;
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}
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APS5_EXPORT("vieBRwlh1Lw", sceAgcUnknown_vieBRwlh1Lw);
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int APS5_VABI sceAgcUnknown_vieBRwlh1Lw(void) {
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NotImplemented_nid_no_patch(__func__);
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return 0;
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}
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}
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@ -13,12 +13,14 @@
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extern "C" int APS5_VABI sceAgcCreateInterpolantMapping_0100(ShaderRegister* regs, const Shader* gs, const Shader* ps);
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extern "C" int APS5_VABI sceAgcUnknownCreateInterpolantMapping(ShaderRegister* regs, const Shader* gs, const Shader* ps);
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extern "C" int APS5_VABI sceAgcUnknown_vieBRwlh1Lw(ShaderRegister* regs, const Shader* gs, const Shader* ps);
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namespace {
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using Registers = std::array<ShaderRegister, 32>;
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const Shader* mappedPixel = nullptr;
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Registers preparedMapping{};
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std::size_t preparedCount = 0;
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unsigned mappings = 0;
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unsigned links = 0;
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@ -65,6 +67,11 @@ void testIdentity() {
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regs = filled();
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check(sceAgcUnknownCreateInterpolantMapping(regs.data(), nullptr, &ps) == 0, "mapping without inputs failed");
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checkIdentity(regs, 0, "mapping without inputs is not the identity");
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regs = filled();
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check(sceAgcUnknown_vieBRwlh1Lw(regs.data(), nullptr, &ps) == 0, "update without inputs failed");
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check(preparedCount == 0u, "update without inputs prepared registers");
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const auto untouched = filled();
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check(std::memcmp(regs.data(), untouched.data(), sizeof(regs)) == 0, "update without inputs wrote registers");
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}
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void testMapping() {
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@ -99,6 +106,15 @@ void testMapping() {
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check(split[4].value == 0x03180002u, "full f16 interpolant mapping changed");
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checkIdentity(split, static_cast<std::uint32_t>(inputs.size()), "unused interpolants are not the identity");
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auto update = filled();
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const auto untouched = filled();
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const std::size_t written = inputs.size() * sizeof(ShaderRegister);
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check(sceAgcUnknown_vieBRwlh1Lw(update.data(), &gs, &ps) == 0, "update mapping failed");
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check(preparedCount == inputs.size(), "update prepared registers past its inputs");
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check(std::memcmp(update.data(), preparedMapping.data(), written) == 0, "prepared update differs from published registers");
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check(std::memcmp(update.data(), split.data(), written) == 0, "update mapping differs from the split f16 mapping");
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check(std::memcmp(update.data() + inputs.size(), untouched.data(), sizeof(update) - written) == 0, "update wrote past its inputs");
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auto regular = filled();
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check(sceAgcCreateInterpolantMapping_0100(regular.data(), &gs, &ps) == 0, "mapping failed");
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check(std::memcmp(regular.data(), preparedMapping.data(), sizeof(regular)) == 0, "prepared mapping differs from published registers");
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@ -106,6 +122,51 @@ void testMapping() {
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checkIdentity(regular, static_cast<std::uint32_t>(inputs.size()), "unused interpolants are not the identity");
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}
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void testUpdateMapping() {
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std::array<ShaderSemantic, 4> inputs{semantic(1, 0, 0), semantic(2, 0, 1), semantic(3, 0, 2), semantic(4, 0, 3)};
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inputs[0].is_custom = 1;
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inputs[0].default_value = 2;
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inputs[1].default_value = 1;
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inputs[1].default_value_hi = 1;
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inputs[2].default_value_hi = 2;
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inputs[3].is_custom = 1;
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inputs[3].default_value = 3;
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inputs[3].default_value_hi = 3;
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std::array<ShaderSemantic, 3> outputs{semantic(1, 5, 0), semantic(2, 7, 1), semantic(4, 9, 3)};
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Shader gs{};
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gs.output_semantics = outputs.data();
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gs.num_output_semantics = static_cast<std::uint16_t>(outputs.size());
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Shader ps{};
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ps.input_semantics = inputs.data();
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ps.num_input_semantics = static_cast<std::uint32_t>(inputs.size());
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auto update = filled();
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const auto untouched = filled();
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check(sceAgcUnknown_vieBRwlh1Lw(update.data(), &gs, &ps) == 0, "update mapping failed");
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check(update[0].value == 0x00000625u, "custom interpolant update changed");
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check(update[1].value == 0x01380107u, "low f16 half update changed");
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check(update[2].value == 0x02480220u, "unmatched high f16 half update changed");
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check(update[3].value == 0x03680709u, "full f16 interpolant update changed");
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for (std::uint32_t i = 0; i < inputs.size(); ++i) {
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check(update[i].offset == ShaderRegs::SPI_PS_INPUT_CNTL_0 + i, "updated register offset changed");
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}
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const std::size_t written = inputs.size() * sizeof(ShaderRegister);
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check(std::memcmp(update.data() + inputs.size(), untouched.data(), sizeof(update) - written) == 0, "update wrote past its inputs");
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auto create = filled();
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check(sceAgcUnknownCreateInterpolantMapping(create.data(), &gs, &ps) == 0, "split f16 mapping failed");
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check(std::memcmp(create.data(), update.data(), written) == 0, "update differs from the split f16 mapping");
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checkIdentity(create, static_cast<std::uint32_t>(inputs.size()), "unused interpolants are not the identity");
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for (const std::uint32_t index : {1u, 3u}) {
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inputs[index].default_value = 0;
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update = filled();
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expectFailure([&] { sceAgcUnknown_vieBRwlh1Lw(update.data(), &gs, &ps); });
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check(std::memcmp(update.data(), untouched.data(), sizeof(update)) == 0, "rejected update wrote registers");
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inputs[index].default_value = inputs[index].default_value_hi;
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}
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}
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void testRejections() {
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std::array<ShaderSemantic, 33> inputs{};
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Shader gs{};
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@ -117,18 +178,23 @@ void testRejections() {
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const auto saved = regs;
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expectFailure([&] { sceAgcCreateInterpolantMapping_0100(regs.data(), &gs, &ps); });
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expectFailure([&] { sceAgcUnknownCreateInterpolantMapping(regs.data(), &gs, &ps); });
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expectFailure([&] { sceAgcUnknown_vieBRwlh1Lw(regs.data(), &gs, &ps); });
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check(std::memcmp(regs.data(), saved.data(), sizeof(regs)) == 0, "rejected mapping wrote registers");
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ps.num_input_semantics = 1;
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expectFailure([&] { sceAgcUnknownCreateInterpolantMapping(regs.data(), nullptr, &ps); });
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expectFailure([&] { sceAgcUnknownCreateInterpolantMapping(nullptr, &gs, &ps); });
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expectFailure([&] { sceAgcUnknown_vieBRwlh1Lw(regs.data(), nullptr, &ps); });
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expectFailure([&] { sceAgcUnknown_vieBRwlh1Lw(nullptr, &gs, &ps); });
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expectFailure([&] { sceAgcUnknown_vieBRwlh1Lw(regs.data(), &gs, nullptr); });
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}
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}
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extern "C" void AgcDriverResolveShaderAbi_nid_postfix(const Shader* shader, std::span<const ShaderRegister> context, std::span<const ShaderRegister> primitive) {
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check(shader != nullptr && context.size() == preparedMapping.size() && primitive.empty(), "invalid mapping preparation call");
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check(shader != nullptr && context.size() <= preparedMapping.size() && primitive.empty(), "invalid mapping preparation call");
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mappedPixel = shader;
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std::copy(context.begin(), context.end(), preparedMapping.begin());
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preparedCount = context.size();
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++mappings;
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}
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@ -141,8 +207,9 @@ int main() {
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try {
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testIdentity();
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testMapping();
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testUpdateMapping();
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testRejections();
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check(mappings == 3u && links == 2u, "mapping preparation call count changed");
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check(mappings == 7u && links == 5u, "mapping preparation call count changed");
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LibcRunShutdown_nid_postfix();
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std::puts("AGC interpolant mapping tests passed");
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return 0;
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@ -239,7 +239,7 @@ Throughout the project, every function at every stage either **does exactly what
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- [sceVoiceQoSInit](../../core/libs/prx/libSceVoiceQoS/Export.cpp) (libSceVoiceQoS) - `0x804E0905` for a second initialization comes from [prosper](https://github.com/mattias800/prosper)'s reading of the module and was not measured: on a PS5 a valid call blocks inside a homebrew payload, so it never returns there. The app type and the block are not used, as no endpoint is implemented
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- AudioIn and NpSessionSignaling exports added without an implementation have assumed signatures
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- [sceNpSessionSignalingGetConnectionFromPeerAddress](../../core/libs/prx/libSceNpSessionSignaling/Export.cpp) (libSceNpSessionSignaling) - imported by PPSA01289 and added without an implementation; unknown signature
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- [vieBRwlh1Lw](../../core/libs/prx/libSceAgc/Unimplemented.cpp) (libSceAgc) - unknown name, signature
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- [vieBRwlh1Lw](../../core/libs/prx/libSceAgc/Shader/src/InterpolantMapping.cpp) (libSceAgc) - unknown name; the `(regs, gs, ps)` arguments of `sceAgcCreateInterpolantMapping_0100` come from OpenAGC only
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- [scePadIsRemoteController](../../core/libs/prx/libScePad/Export.cpp) (libScePad) - the name hashes to NID `fCWdlnmB1Ks`; the signature `(int handle, bool* remote)` comes from PPSA16064, which zeroes a byte, passes its address after `scePadGetControllerInformation` and ignores the result. The error codes follow the other pad calls. Controllers are local devices, so the answer is always false
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- [scePadSetAngularVelocityBiasCorrectionState](../../core/libs/prx/libScePad/Export.cpp) (libScePad) - inferred signature `(int handle, bool enabled)` follows `scePadSetTiltCorrectionState` and `scePadSetAngularVelocityDeadbandState`; an invalid handle returns `PAD_ERROR_INVALID_HANDLE`, disabling is a no-op, and enabling throws because bias correction is not modelled
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- [sceKernelGetOperationMode](../../core/libs/prx/libkernel/System/src/Process.cpp) (libkernel) - the signature `(int* mode, int* submode)` comes from PPSA12544, which logs both values after the call; the values are unknown and 0 is reported for both, as in the [prosper](https://github.com/mattias800/prosper/pull/4153) reimplementation. Null outputs throw
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@ -342,6 +342,7 @@ Throughout the project, every function at every stage either **does exactly what
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- [sceSharePlayInitialize](../../core/libs/prx/libSceSharePlay/Export.cpp) (libSceSharePlay) - the library keeps no state, so the heap is not used. A null heap is accepted: PPSA11386 passes a null heap and 0x1800 bytes and stops on any non-zero result. The error for a zero size is unknown, so it throws
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- [sceAgcDcbSetZPassPredicationEnableGetSize, sceAgcDcbSetPredicationDisableGetSize, sceAgcDcbSetBoolPredicationEnableGetSize](../../core/libs/prx/libSceAgc/DcbState/src/Predication.cpp) (libSceAgc) - the builders are inline in the SDK and not exported; the size is assumed to be that of the SET_PREDICATION packet `sceAgcDcbSetPredication` writes (16 bytes)
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- [Resource registration](../../core/libs/prx/libSceAgcDriver/Resource/src/Registration.cpp) (libSceAgcDriver) - registration always fails with `RESOURCE_REGISTRATION_UNAVAILABLE`, so the owner and resource queries, `sceAgcDriverSetResourceUserData`, `sceAgcDriverFindResourcesPublic` and `sceAgcDriverUnregisterAllResourcesForOwner` return the same error without reading their arguments. Their parameter lists follow the libSceGnmDriver counterparts and are unverified. `sceAgcDriverGetResourceRegistrationMaxNameLength` writes 0xfc and returns 0, as [prosper](https://github.com/mattias800/prosper) does from a title's registration configuration; the `uint32_t*` parameter matches the SDK wrapper `sce::Agc::ResourceRegistration::getMaxNameLength(unsigned int*)`. sharpemu writes 256 and KytyPS5 returns `RESOURCE_REGISTRATION_UNAVAILABLE`, so the value is unverified; a null output throws
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- [vieBRwlh1Lw](../../core/libs/prx/libSceAgc/Shader/src/InterpolantMapping.cpp) (libSceAgc) follows [OpenAGC](https://github.com/OpenAGC/OpenAGC/blob/3c7e8072f0d7684e930454794fd5c02056946d73/src/game_compat.c) only, not confirmed on hardware: the `dbOlWdppb4o` transform without the identity tail, so it writes one register per pixel shader input and none for a pixel shader without inputs, and a null pixel shader throws. For an `is_f16` 1 or 3 input whose `default_value` and `default_value_hi` differ it throws: OpenAGC takes `DEFAULT_VAL` from `default_value_hi`, while KytyPS5, sharpemu and `dbOlWdppb4o` here take it from `default_value`
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- [sceAgcDriverRegisterMultipleResources](../../core/libs/prx/libSceAgcDriver/Resource/src/Registration.cpp) uses the existing unavailable-registration state and leaves caller memory untouched. Its four arguments (uint32 handle output, uint32 owner, descriptor pointer, uint32 count) follow the original PPSA34502 / 01.010.000 codzm call. The caller builds 40-byte descriptors and explicitly accepts 0x8A6C9018 with an invalid output handle. Enabled registration and console argument-validation precedence are unverified.
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- [Shader registration](../../core/libs/prx/libSceAgcDriver/Execution/src/Driver/Shaders/ShaderRegistry.cpp) (libSceAgcDriver) - a shader header is accepted at any address: PPSA26344 passes headers 4 and 1 bytes past an 8-byte boundary; whether the console refuses an alignment is unknown
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- [NGG vertex workgroups](../../core/libs/prx/libSceAgcDriver/Execution/src/Driver/Shaders/ShaderRegistry.cpp) (libSceAgcDriver) - type-2 PRIMGEN programs using DS instructions or `s_barrier` are prepared with the draw's routing and primitive registers on the existing mesh path. The workgroup requirement follows [Mesa's NGG lowering](https://github.com/mihawk-99/PS5_Mesa/blob/b3588f78dd7fd46fbadc7ecd487e5f14d4213e4b/src/amd/common/nir/ac_nir_lower_ngg.c#L1135); the mesh path supplies LDS and two guest lanes per host invocation for wave64 on a 32-lane host subgroup. Console routing has not been measured. Passthrough and tessellation keep their existing paths; unsupported mesh assembly and subgroup budgets throw.
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