Merge pull request #152 from Digote/feat/shader-s-bitcmp-b64
feat(shader): support 64-bit scalar bit compare
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commit
c09b8759b2
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@ -153,6 +153,8 @@ enum class RdnaOpcode : std::uint16_t {
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SSubbU32,
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SBitcmp0B32,
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SBitcmp1B32,
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SBitcmp0B64,
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SBitcmp1B64,
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SBitset0B32,
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SBitset1B32,
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SBitset0B64,
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@ -72,6 +72,8 @@ bool IsScalarAluOpcode(RdnaOpcode opcode) {
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case RdnaOpcode::SSubbU32:
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case RdnaOpcode::SBitcmp0B32:
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case RdnaOpcode::SBitcmp1B32:
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case RdnaOpcode::SBitcmp0B64:
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case RdnaOpcode::SBitcmp1B64:
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case RdnaOpcode::SBitset0B32:
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case RdnaOpcode::SBitset1B32:
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case RdnaOpcode::SBitset0B64:
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@ -123,6 +123,8 @@ RdnaOpcode decodeSopcOpcode(std::uint32_t opcode) {
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case 0x0bu: return RdnaOpcode::SCmpLeU32;
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case 0x0cu: return RdnaOpcode::SBitcmp0B32;
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case 0x0du: return RdnaOpcode::SBitcmp1B32;
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case 0x0eu: return RdnaOpcode::SBitcmp0B64;
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case 0x0fu: return RdnaOpcode::SBitcmp1B64;
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case 0x12u: return RdnaOpcode::SCmpEqU64;
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case 0x13u: return RdnaOpcode::SCmpLgU64;
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default: throw std::invalid_argument("unsupported SOPC opcode " + std::to_string(opcode));
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@ -184,6 +184,7 @@ private:
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bool vBfeU32(const RdnaInstruction& inst, bool sign);
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bool vBfiB32(const RdnaInstruction& inst);
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bool sBitcmpB32(const RdnaInstruction& inst, bool expected);
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bool sBitcmpB64(const RdnaInstruction& inst, bool expected);
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bool vAlignbitB32(const RdnaInstruction& inst);
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bool vAlignbyteB32(const RdnaInstruction& inst);
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bool vLshlAddU32(const RdnaInstruction& inst);
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@ -484,6 +484,15 @@ bool TranslationContext::sBitcmpB32(const RdnaInstruction& inst, bool expected)
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return true;
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}
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bool TranslationContext::sBitcmpB64(const RdnaInstruction& inst, bool expected) {
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const IrU64 value = readU64(sourceAt(inst, 0u));
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const IrU32 offset(ir.BitwiseAnd(readU32(sourceAt(inst, 1u)).Value(), ir.Constant(63u)));
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const IrU64 shifted(ir.Emit(IrOpcode::ShiftRightLogical64, IrType::U64, {&value.Value(), &offset.Value()}));
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const IrU64 bit(ir.Emit(IrOpcode::BitwiseAnd64, IrType::U64, {&shifted.Value(), &ir.ConstantU64(1u)}));
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writeCompareResult(inst.destination, IrU1(ir.Emit(IrOpcode::IEqual64, IrType::U1, {&bit.Value(), &ir.ConstantU64(expected ? 1u : 0u)})));
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return true;
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}
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bool TranslationContext::vAlignbitB32(const RdnaInstruction& inst) {
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const IrU32 hi = readU32(sourceAt(inst, 0u));
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const IrU32 lo = readU32(sourceAt(inst, 1u));
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@ -290,6 +290,10 @@ bool TranslationContext::emitScalar(const RdnaInstruction& inst) {
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return sBitcmpB32(inst, false);
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case RdnaOpcode::SBitcmp1B32:
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return sBitcmpB32(inst, true);
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case RdnaOpcode::SBitcmp0B64:
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return sBitcmpB64(inst, false);
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case RdnaOpcode::SBitcmp1B64:
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return sBitcmpB64(inst, true);
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case RdnaOpcode::SPackLlB32B16:
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return packB16(inst, false, false);
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case RdnaOpcode::SPackLhB32B16:
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