test(shader): cover the SOPK s_waitcnt counters and count them as decoded
The decoder maps SOPK opcodes 0x17 to 0x1a to SWaitcnt, but no test encoded them and tools/progress.py only counted S_WAITCNT_VSCNT. The test runs the four waits with a null and a live register field and checks that SCC and the register are left unchanged. Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>
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#include "prx/libSceAgcDriver/Execution/include/VulkanDevice.hpp"
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#include "prx/libSceAgcDriver/Graphics/include/Draw.hpp"
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#include "Recompiler.hpp"
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#include "VulkanTestDevice.hpp"
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#include <algorithm>
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#include <array>
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#include <cstddef>
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#include <cstdint>
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#include <cstdio>
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#include <iostream>
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#include <span>
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#include <string>
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#include <vector>
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namespace {
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using AgcDriver::Graphics::Require;
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using ShaderRecompiler::ShaderStage;
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struct Wait {
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std::uint32_t opcode;
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const char* name;
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};
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constexpr std::array<Wait, 4> Waits{{
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{0x17u, "s_waitcnt_vscnt"},
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{0x18u, "s_waitcnt_vmcnt"},
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{0x19u, "s_waitcnt_expcnt"},
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{0x1au, "s_waitcnt_lgkmcnt"},
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}};
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constexpr std::uint32_t Threads = 32;
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constexpr std::uint32_t Results = 64;
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constexpr std::uint32_t OutputRegister = 4;
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constexpr std::uint32_t ValueRegister = 8;
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constexpr std::uint32_t MaskRegister = 30;
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constexpr std::uint32_t BitRegister = 31;
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constexpr std::uint32_t NullRegister = 0x7du;
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constexpr std::uint32_t ThreadVector = 0;
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constexpr std::uint32_t IndexVector = 3;
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constexpr std::uint32_t DataVector = 10;
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constexpr std::uint32_t ConstantZero = 0x80u;
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constexpr std::uint32_t ConstantOne = 0x81u;
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constexpr std::uint32_t ConstantTwo = 0x82u;
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constexpr std::uint32_t ConstantSix = 0x86u;
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constexpr std::uint32_t Endpgm = 0xbf810000u;
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constexpr std::uint32_t Value = 0x12345678u;
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constexpr std::uint32_t SccKept = 1u;
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constexpr std::uint32_t SccRaised = 2u;
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constexpr std::array<std::uint32_t, 2> Registers{NullRegister, ValueRegister};
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constexpr std::array<std::uint16_t, 3> Levels{0x0000u, 0x003fu, 0xffffu};
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constexpr std::size_t Cases = Waits.size() * Registers.size() * Levels.size();
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constexpr std::size_t CodeWords = 2u + Cases * 15u;
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alignas(256) std::array<std::uint32_t, Threads * Results> Output{};
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constexpr std::uint32_t Sop1(std::uint32_t opcode, std::uint32_t destination, std::uint32_t source) {
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return 0xbe800000u | (destination << 16u) | (opcode << 8u) | source;
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}
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constexpr std::uint32_t Sop2(std::uint32_t opcode, std::uint32_t destination, std::uint32_t source0, std::uint32_t source1) {
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return 0x80000000u | (opcode << 23u) | (destination << 16u) | (source1 << 8u) | source0;
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}
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constexpr std::uint32_t Sopc(std::uint32_t opcode, std::uint32_t source0, std::uint32_t source1) {
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return 0xbf000000u | (opcode << 16u) | (source1 << 8u) | source0;
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}
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constexpr std::uint32_t Sopk(std::uint32_t opcode, std::uint32_t reg, std::uint16_t immediate) {
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return 0xb0000000u | (opcode << 23u) | (reg << 16u) | immediate;
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}
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constexpr std::uint32_t Vop1(std::uint32_t opcode, std::uint32_t destination, std::uint32_t source) {
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return 0x7e000000u | (destination << 17u) | (opcode << 9u) | source;
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}
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constexpr std::uint32_t Vop2(std::uint32_t opcode, std::uint32_t destination, std::uint32_t source0, std::uint32_t source1) {
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return (opcode << 25u) | (destination << 17u) | (source1 << 9u) | source0;
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}
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constexpr std::array<std::uint32_t, CodeWords> BuildCode() {
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constexpr std::uint32_t sMovB32 = 0x03u;
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constexpr std::uint32_t sCselectB32 = 0x0au;
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constexpr std::uint32_t sOrB32 = 0x10u;
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constexpr std::uint32_t sCmpEqI32 = 0x00u;
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constexpr std::uint32_t sCmpLgI32 = 0x01u;
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constexpr std::uint32_t vMovB32 = 0x01u;
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constexpr std::uint32_t vLshlrevB32 = 0x1au;
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constexpr std::uint32_t bufferStoreDwordIndexed = 0xe0702000u;
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constexpr std::uint32_t storeOperands = (ConstantZero << 24u) | ((OutputRegister / 4u) << 16u) | (DataVector << 8u) | IndexVector;
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std::array<std::uint32_t, CodeWords> code{};
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std::size_t count = 0;
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std::uint32_t result = 0;
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code[count++] = Vop2(vLshlrevB32, IndexVector, ConstantSix, ThreadVector);
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for (const Wait& wait : Waits) {
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for (const std::uint32_t reg : Registers) {
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for (const std::uint16_t level : Levels) {
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code[count++] = Sop1(sMovB32, MaskRegister, ConstantZero);
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code[count++] = Sopc(sCmpEqI32, ValueRegister, ValueRegister);
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code[count++] = Sopk(wait.opcode, reg, level);
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code[count++] = Sop2(sCselectB32, BitRegister, ConstantOne, ConstantZero);
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code[count++] = Sop2(sOrB32, MaskRegister, MaskRegister, BitRegister);
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code[count++] = Sopc(sCmpLgI32, ValueRegister, ValueRegister);
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code[count++] = Sopk(wait.opcode, reg, level);
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code[count++] = Sop2(sCselectB32, BitRegister, ConstantTwo, ConstantZero);
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code[count++] = Sop2(sOrB32, MaskRegister, MaskRegister, BitRegister);
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code[count++] = Vop1(vMovB32, DataVector, MaskRegister);
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code[count++] = bufferStoreDwordIndexed | (result++ * 4u);
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code[count++] = storeOperands;
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code[count++] = Vop1(vMovB32, DataVector, ValueRegister);
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code[count++] = bufferStoreDwordIndexed | (result++ * 4u);
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code[count++] = storeOperands;
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}
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}
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}
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code[count++] = Endpgm;
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return code;
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}
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alignas(256) constexpr std::array<std::uint32_t, CodeWords> WaitCode = BuildCode();
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std::array<std::uint32_t, 4> BufferDescriptor(const void* data, std::uint32_t count) {
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const auto address = reinterpret_cast<std::uintptr_t>(data);
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return {static_cast<std::uint32_t>(address), static_cast<std::uint32_t>((address >> 32u) & 0xffffu) | (4u << 16u), count, 0x01016facu};
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}
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std::string Hex(std::uint32_t value) {
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char text[16];
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std::snprintf(text, sizeof(text), "0x%08x", value);
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return text;
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}
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void Run(AgcDriver::VulkanDevice& device) {
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Output.fill(0xdeadbeefu);
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std::vector<std::uint32_t> userData(ValueRegister + 1u, 0u);
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const auto output = BufferDescriptor(Output.data(), static_cast<std::uint32_t>(Output.size()));
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std::copy(output.begin(), output.end(), userData.begin() + OutputRegister);
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userData[ValueRegister] = Value;
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const std::span<const std::uint32_t> code(WaitCode);
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const std::array<ShaderRecompiler::MemoryRegion, 1> memory{{{reinterpret_cast<std::uintptr_t>(code.data()), std::as_bytes(code)}}};
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const ShaderRecompiler::ShaderComputeStageInfo compute{{Threads, 1, 1}, 0, {false, false, false}, false, 1};
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ShaderRecompiler::RecompileRequest request{
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{ShaderStage::Compute, reinterpret_cast<std::uintptr_t>(code.data()), code, 0, {}},
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{32, 0, userData, compute, std::nullopt, std::nullopt, memory},
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device.Target(),
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{0, 0, 0, 128}
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};
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request.useCache = false;
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const auto result = ShaderRecompiler::Recompile(request);
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device.Dispatch(result, 1, 1, 1, {}, reinterpret_cast<std::uintptr_t>(code.data()));
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device.WaitIdle();
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}
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void Check() {
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for (std::uint32_t tid = 0; tid < Threads; ++tid) {
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std::uint32_t result = 0;
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for (const Wait& wait : Waits) {
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for (const std::uint32_t reg : Registers) {
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for (const std::uint16_t level : Levels) {
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const std::string label = "scalar sopk waitcnt: thread " + std::to_string(tid) + " " + wait.name + " register " + Hex(reg) + ", level " + Hex(level);
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const std::uint32_t mask = Output[tid * Results + result++];
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const std::uint32_t value = Output[tid * Results + result++];
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Require((mask & SccKept) != 0u, label + " cleared SCC");
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Require((mask & SccRaised) == 0u, label + " set SCC");
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Require(mask == SccKept, label + " left the flags at " + Hex(mask));
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Require(value == Value, label + " left s" + std::to_string(ValueRegister) + " at " + Hex(value) + ", expected " + Hex(Value));
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}
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}
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}
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}
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}
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}
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int main() {
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try {
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const auto device = OpenVulkanTestDevice();
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if (!device) return VulkanTestSkipped;
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Run(*device);
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Check();
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std::puts("scalar sopk waitcnt tests passed");
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return 0;
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} catch (const std::exception& error) {
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std::cerr << error.what() << '\n';
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return 1;
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}
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}
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@ -39,7 +39,7 @@ OPCODE_VARIANTS = {
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"SCmpGeU32": ("S_CMPK_GE_U32",),
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"SCmpLtU32": ("S_CMPK_LT_U32",),
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"SCmpLeU32": ("S_CMPK_LE_U32",),
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"SWaitcnt": ("S_WAITCNT_VSCNT",),
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"SWaitcnt": ("S_WAITCNT_VSCNT", "S_WAITCNT_VMCNT", "S_WAITCNT_EXPCNT", "S_WAITCNT_LGKMCNT"),
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"STtracedata": ("S_TTRACEDATA_IMM",),
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"SCbranchCdbg": ("S_CBRANCH_CDBGSYS", "S_CBRANCH_CDBGUSER", "S_CBRANCH_CDBGSYS_OR_USER", "S_CBRANCH_CDBGSYS_AND_USER"),
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"VAddI32": ("V_ADD_CO_U32",),
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