test(shader): mask the ds_wrxchg2 lanes with a per-lane compare

The masked case loaded EXEC from a scalar literal. A scalar mask is read
by subgroup lane, so on a host whose subgroups are narrower than the wave
(llvmpipe: 8 lanes) lane 16 took bit 0 and stayed active. v_cmpx_gt_u32
on the thread id gives the same low 16 lanes on any subgroup size.

Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>

core/libs/prx/libSceAgcDriver/tests/execution/DsWrxchg2.cpp

@@ -35,7 +35,7 @@ alignas(256) constexpr auto Code = std::to_array<std::uint32_t>({
     0xd8b82000, 0x0a07061e,
     0xd8bc0103, 0x0c06071e,
     0xd8b8a060, 0x0e0f0e1e,
-    0xbefe03ff, 0x0000ffff,
+    0x7da80090,
     0xd8b880e0, 0x1007061e,
     0xbefe03c1,
     0xbf8cc07f,