Commit Graph

147 Commits

Author SHA1 Message Date
Dean 7580b9e44c
Merge pull request #679 from Celegans12/fix/relinker-windows-low-entropy-stacks
fix(relinker): keep Windows startup stacks below the guest arena
2026-10-06 07:57:17 +13:00
Dean cd8b6f3fcb
Merge pull request #662 from NumberGuan/codex/fix-autorun-exit-status
fix(relinker): decode autorun exit status for the host
2026-10-06 07:56:24 +13:00
Celegans12 823c3caf4f fix(relinker): keep Windows startup stacks below the guest arena
The PE writer marked relocatable executables HIGH_ENTROPY_VA. Windows
then places the main thread stack, TEB, PEB and the loader threads'
stacks, which exist before libc reserves the guest arena from
0x2_0000_0000, anywhere in the first TiB. Nearly half the time they
land inside the arena and stay there as holes that fixed guest
mappings cannot use.

DllCharacteristics is now 0x140 (DYNAMIC_BASE, NX_COMPAT). The image
is still relocated and bottom-up allocations keep the 8-bit
randomization, but they start near the bottom of the address space,
far below the arena. DLL placement does not depend on this flag.

windows_address_space checks the flags and, on Windows, runs a
relinked guest that returns the high dword of its stack pointer.

Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>
2026-10-05 17:51:50 +02:00
Tomás Ortellado 1fa44c7b5c fix(relinker): decode autorun exit status for the host 2026-10-05 09:23:47 -03:00
Tomás Ortellado 9f9e4e28b8 fix(relinker): reject invalid and overflowing alignment 2026-10-05 08:44:55 -03:00
Dean Galvin 7103f390cf fix(relinker): keep the host libc.prx needed on Linux when a title bundles its own
A title that ships sce_module/libc.prx makes addHost drop the host
libc.prx from the executable's dependencies. Every host prx needs it, but
their DT_RUNPATH is empty, so loading fails with "libc.prx: cannot open
shared object file".

Mirror the Windows rule from WindowsImportBuilder: when libSceLibcInternal.prx
is a host dependency and no host libc.prx remains, append libc.prx as the
last host dependency. The title's own imports still bind to the guest
modules first.

Refs #476
2026-10-05 20:36:29 +13:00
Nicolas Abosch 93efde8056 fix(relinker): merge function symbol alias extents 2026-10-05 01:50:14 -03:00
NumberGuan 75f407b926 fix(relinker): discover bundled modules in prx directories
Preserve each bundled module directory under app0 and resolve Linux dependencies across directories. Add integration coverage for both output formats and Windows startup. Refs #556; duplicate-export rejection remains unchanged.
2026-10-04 23:22:50 -03:00
Dean bc0726c486
Merge pull request #583 from DiulioAires/fix/bytewriter-bounds
fix(relinker): check byte writer bounds
2026-10-05 14:30:37 +13:00
DotDebian e11b4b5554 feat(relinker): lower SHA-1 instructions with a memory operand
SHA1RNDS4/NEXTE/MSG1/MSG2 with a memory source made `--to-intel` fail
the whole relink. The stub now spills a scratch xmm, loads the operand
into it with the unaligned load already used for SHA-256 and runs the
register-form lowering. The SHA1RNDS4 immediate is read after the SIB
byte and displacement. RIP-relative operands still fail: the stub runs
at a different address.

Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>
2026-10-05 02:02:13 +02:00
Dean d220149542
Merge pull request #299 from Pouare514/fix/relinker-tls-tail
fix(relinker): tolerate trailing data in TLS scan
2026-10-05 12:44:41 +13:00
DiulioAires b6c97084ed fix(relinker): check byte writer bounds 2026-10-04 20:17:21 -03:00
Pouare514 0b5fe3c23c fix(relinker): detect FS-prefixed previous instruction via SegmentPrefix decode 2026-10-05 00:56:11 +02:00
Pouare514 49feb79476 fix(relinker): scan overlapping span from address and cover FS-prefixed previous instruction 2026-10-04 15:41:17 +02:00
Pouare514 52587f8cf1 fix(relinker): tolerate trailing data in TLS scan 2026-10-04 15:27:57 +02:00
QDarkRex 47f0bf93ef fix(relinker): identify unsupported Windows TLS instructions
The unsupported-instruction error now lists the instruction bytes, and the relink failure names the input file, the main executable or the guest module, on an extra Input: line.
2026-10-04 19:09:10 +07:00
Dean 9f9a8f5a53
Merge pull request #340 from QDarkRex/fix/relinker-tls-fs-disp32
fix(relinker): load Windows guest TLS values at signed displacements
2026-10-04 20:39:50 +13:00
Dean 8a64778581
Merge pull request #486 from RomainROCH/codex/fix-executable-segments
fix(relinker): validate all executable segments and preserve live imports
2026-10-04 20:09:49 +13:00
Dean 3237b6b548
Merge pull request #484 from RomainROCH/codex/fix-elf-string-bounds
fix(relinker): bound dynamic strings by the declared table size
2026-10-04 20:09:33 +13:00
QDarkRex ab5c339039 fix(relinker): reject guest TLS loads from unmodelled control block fields
Loads at fs:1 through fs:0x27 read tcb_dtv and tcb_thread on the FreeBSD layout, which the Windows thread control block does not model, so they returned zero. Accept only the TLS block, fs:0 and the stack guard at fs:0x28, and fail the relink for the rest.
2026-10-04 14:09:19 +07:00
Adrià Franch 5fc16a9548 feat(relinker): lower SHA-256 instructions with a memory operand
SHA256RNDS2/MSG1/MSG2 with a memory source made `--to-intel` fail the
whole relink. The stub now spills a scratch xmm, loads the operand into
it with MOVDQU (AMD does not fault on a misaligned SHA operand, so the
unaligned load keeps that behaviour) and runs the register-form
lowering. RSP-based operands get the spill depth added to their
displacement. RIP-relative operands still fail: the stub runs at a
different address.

Co-Authored-By: Claude <noreply@anthropic.com>
2026-10-04 08:21:40 +02:00
RomainROCH a35e0cfc84 test(relinker): register segment coverage beside load alignment checks 2026-10-04 05:59:16 +02:00
RomainROCH 85d036ca19 perf(relinker): reuse each segment scan across import records 2026-10-04 05:37:13 +02:00
QDarkRex d8684cb184 test(relinker): add C++ unit test for WindowsIconResourceBuilder 2026-10-04 10:29:20 +07:00
QDarkRex 9642d1b3b0 fix(relinker): add icons to generated Windows executables 2026-10-04 10:29:20 +07:00
RomainROCH 328def4bab fix(relinker): validate all executable segments and preserve live imports 2026-10-04 05:26:01 +02:00
RomainROCH e63524ae34 fix(relinker): bound dynamic strings by the declared table size 2026-10-04 05:23:18 +02:00
Dean Galvin 097566d547 fix(relinker): lower VRSQRTPS and VRCPPS to correctly rounded results for --to-intel
RSQRTPS and RCPPS are approximations whose low bits differ between Intel
and AMD. Intel returns 0x3F7FF000 for 1/sqrt(1.0), and two Newton-Raphson
steps on it settle on 0.99999994 instead of 1.0. PPSA21564 renormalises
its spring quaternions that way: an identity quaternion keeps w at
0.99999994 with a zero axis, its axis-angle conversion then normalises the
zero axis into NaNs, and the NaN bone poses reach keyframed physics bodies.
A NaN body later moves to an invalid broadphase cell and the game crashes
a few seconds into its hub level.

--to-intel now replaces the VEX.128 register forms with an out-of-line stub
that computes 1/sqrt(x) with SQRTPS and DIVPS (1/x with DIVPS), keeping
the upper half of the destination cleared and the scratch register intact.
A site with no room for the jump, including one followed by a branch
target or a RIP-relative instruction, keeps the native instruction and is
reported as kept instead of failing the relink.
2026-10-04 14:40:16 +13:00
Dean 40a9e455ea
Merge pull request #430 from adriadam10/feat/relinker-sha1-lowering
feat(relinker): lower SHA-1 instructions for --to-intel
2026-10-04 14:14:08 +13:00
Dean d43b12c34e
Merge pull request #433 from adriadam10/fix/relinker-sse4a-upper-qword
fix(relinker): zero dst[127:64] in EXTRQ and INSERTQ lowerings
2026-10-04 14:05:41 +13:00
Dean 40b1c7a6f9
Merge pull request #432 from adriadam10/fix/relinker-vex-rip-relative
fix(relinker): report RIP-relative operands of VEX, EVEX and 0F38/0F3A instructions
2026-10-04 14:05:25 +13:00
Adrià Franch b066079628 fix(relinker): zero dst[127:64] in EXTRQ and INSERTQ lowerings
The APM leaves bits 127:64 of the destination undefined after EXTRQ and
INSERTQ, but hardware zeroes them, and the register-form INSERTQ stub
already does the same (#185). The other paths kept the old high qword, so
a following register-form INSERTQ that reads its length and index from
that qword computed the wrong low qword too.

Every stub path that left the high qword now ends with movq dst, dst.
The in-place PSRLQ, PMOVZX and PBLENDW forms leave it non-zero and have
no room for the movq, so those sites now take a stub. The two in-place
forms that emitted nothing now emit movq dst, dst.

Co-Authored-By: Claude <noreply@anthropic.com>
2026-10-03 08:21:33 +02:00
Adrià Franch ee3b215f33 fix(relinker): report RIP-relative operands of VEX, EVEX and 0F38/0F3A instructions
DecodeInstruction returned before the ModRM byte for VEX and EVEX and
read the third opcode byte of 0F 38/0F 3A as ModRM, so their
RIP-relative operands were never reported. --to-intel then moved such an
instruction after a short EXTRQ/INSERTQ into the stub with its
displacement unchanged, and the strict unused-import filter missed its
references.

Co-Authored-By: Claude <noreply@anthropic.com>
2026-10-03 08:10:29 +02:00
Adrià Franch 71ca3ff4b8 feat(relinker): lower SHA-1 instructions for --to-intel
SHA1RNDS4, SHA1NEXTE, SHA1MSG1 and SHA1MSG2 passed through --to-intel
unchanged, so a relinked title that executes them faults on Intel CPUs
without SHA-NI. Their register forms are now lowered out of line with
SSE2 only through the shared stub builder; short sites share stubs via
MatchSequence. Memory forms fail the relink with the file offset, as for
SHA-256.

Co-Authored-By: Claude <noreply@anthropic.com>
2026-10-03 07:40:41 +02:00
Dean Galvin d8b8aafc65 fix(relinker): hand the guest the real argv on Linux
The Linux entry stub built a copy of the entry parameter block holding
argc and a pointer to the host argv array, so the guest read that pointer
as argv[0] and uninitialised stack as argv[1..]. The process stack at
entry already has the guest's layout (argc as a qword, then the argv
pointers and a null), so pass rsp itself.

Test: linux_entry_argv relinks a fixture whose entry checks argc and
argv and runs the output on Linux x86-64.
2026-10-03 13:40:06 +13:00
QDarkRex 508a9710ae fix(relinker): report TLS bounds failures at file offsets 2026-10-02 16:14:54 +07:00
QDarkRex 102e042a49 fix(relinker): bound guest TLS loads to the thread block 2026-10-02 15:45:50 +07:00
QDarkRex 721984a28f fix(relinker): load Windows guest TLS at signed displacements 2026-10-02 15:19:25 +07:00
boykopovar c00bc19c0d
Merge pull request #222 from YossiYad/feat/windows-tls-load-registers
feat(relinker): load the fs:[0] thread pointer into any register in Windows guest code
2026-10-02 10:06:12 +03:00
Yossi Yadgar 53d4ef41d2 feat(relinker): load the fs:[0] thread pointer into any register in Windows guest code 2026-10-01 18:42:14 +03:00
ljkx d54dfb1595 fix(relinker): ignore a REX prefix that is followed by another prefix
In 64-bit mode a REX prefix only takes effect when it immediately
precedes the opcode; a REX followed by a legacy prefix or another REX is
ignored. The instruction decoder, the rewriter's reference classifier,
DecodedInstruction and the SSE4a, SHA-256 and CLZERO operand decoders
read legacy prefixes and then at most one REX. `48 F3 0F 2B 00`
(MOVNTSS) was therefore scanned as `[48 F3][0F 2B 00]` and kept, and
`48 67 0F 01 FC` lost its address-size prefix.

All of them now accept REX bytes among the prefixes and keep only one
that directly precedes the opcode. The converter's guard against
prefix-only fragments is removed, since the decoder no longer produces
them, and the TechnicalDebt entry describing the split is dropped.

Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>
2026-10-01 13:09:11 +02:00
ljkx 09cb86b076 feat(relinker): lower CLZERO for --to-intel
Lower CLZERO out of line instead of failing the relink: the 64-byte line
containing rAX (EAX with 67h) is cleared with four MOVNTDQ stores of
zero, the same non-temporal, weakly ordered store. The line address is
masked in xmm0 so RFLAGS stays untouched; xmm0 and rcx are spilled below
the red zone. Short sites share stubs through MatchSequence. CLZERO with
LOCK, an FS/GS override, a 66/F2/F3 prefix or longer than 15 bytes fails
the relink.

The decoder splits a REX followed by another prefix into a separate
instruction, which would hide a prefix that changes what CLZERO or the
next instruction does. The converter now fails the relink when such a
prefix-only fragment directly precedes an AMD-only instruction or would
be moved into a stub as a trailing instruction.

Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>
2026-10-01 12:30:35 +02:00
boykopovar c7fb2575a3
Merge pull request #208 from boykopovar/refactor/split-libs-tests-cmake
Refactor/split libs tests cmake
- Moved test inclusions from `core/libs/CMakeLists.txt` to local library CMakeLists.txt files.
- Created CMakeLists.txt files for `libSceSystemService, libSceContentExport, libSceNet, libSceNetCtl, libSceRandom, libSceRtc, libSceJson2, and libSceFiber`.
- The shared libSceNet/libSceNetCtl test is included in libSceNet.
- Added the shared function add_test_executable for hosting test executables.
- Added add_png_decoder(target runtimeTarget) and add_jpeg_decoder(target runtimeTarget). The runtimeTarget parameter is required; libc is currently passed. A non-existent target causes a CMake error. - The decoder is used by the PRX libraries, meaning exceptions from there should be thrown through our libc.prx.

Changed file locations relative to the build folder (previously they were stored in core/libs):
- tests/ - all test executables
- `core/libs/libs/implib/` - PRX import libraries (*.dll.a)

The number of tests found has not changed (88)
2026-10-01 12:55:05 +03:00
boykopovar f694c1387c
Merge pull request #201 from ljkx/feat/monitorx-mwaitx-to-intel
feat(relinker): lower MONITORX and MWAITX for --to-intel
2026-10-01 12:50:04 +03:00
boykopovar 61ba4d661a refactor(cmake): place all test executables in build tests directory 2026-10-01 12:28:06 +03:00
SamG-Coder ad6b37ed42 fix(relinker): resolve guest dependencies and lifecycle arrays 2026-10-01 11:57:13 +03:00
SamG-Coder 3c5fe188b7 fix(relinker): forward Windows arguments to guest startup 2026-10-01 11:57:13 +03:00
Yossi Yadgar 058ba1e08d fix(relinker): name the SELF container and the bytes read when the input is not an ELF 2026-10-01 11:47:55 +03:00
ljkx f994b4f89f feat(relinker): lower MONITORX and MWAITX for --to-intel
Replace MONITORX with a NOP and MWAITX with PAUSE in place, padded with
NOPs to the original length, instead of failing the relink. MWAITX may
return before its timer or a store to the monitored line, and without an
armed monitor it does not wait, so callers already re-check their
condition; the replacement takes that path every time.

Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>
2026-10-01 10:35:23 +02:00
boykopovar 261272909c
Merge pull request #200 from ljkx/feat/sha256-to-intel
feat(relinker): lower SHA-256 instructions for --to-intel
2026-10-01 11:31:02 +03:00