Commit Graph

411 Commits

Author SHA1 Message Date
Sanjaysrinivas efdbbf1a70 fix(progress): report shared-source libraries 2026-10-07 21:40:38 +02:00
Adrià 4764e59c37
Merge pull request #888 from adriadam10/feat/libc-force-tls-destructor
feat(libSceLibcInternal): implement _sceLibcInternalForceTlsDestructor
2026-10-07 21:35:25 +02:00
Adrià cea1ef13c3
Merge pull request #902 from Celegans12/fix/agc-unaligned-shader-headers
fix(agc): accept unaligned shader headers
2026-10-07 18:27:47 +02:00
Adrià d95ce1f29c
Merge pull request #898 from alfalfa-star/feat/agc-cond-indirect-buffer
feat(agc): run COND_INDIRECT_BUFFER branches whose comparison always passes
2026-10-07 18:26:59 +02:00
Adrià 3f7fe285a0
Merge pull request #900 from alfalfa-star/feat/libkernel-acp-protection
feat(libkernel): accept the audio coprocessor memory protection bits
2026-10-07 18:26:06 +02:00
Adrià 6b3e8c476e
Merge pull request #835 from adriadam10/feat/appcontent-addcont-info
feat(libSceAppContent): implement sceAppContentGetAddcontInfo and GetAddcontInfoList
2026-10-07 18:25:31 +02:00
Adrià 0da8f48cfc
Merge pull request #831 from adriadam10/feat/audio3d-object-reserve
feat(libSceAudio3d): implement sceAudio3dObjectReserve and sceAudio3dObjectUnreserve
2026-10-07 18:24:56 +02:00
Adrià 4b16995d91
Merge pull request #807 from adriadam10/feat/kernel-timer-event
feat(libkernel): sceKernelAddTimerEvent and sceKernelDeleteTimerEvent
2026-10-07 18:22:56 +02:00
Adrià Franch cc789786de feat(libSceLibcInternal): implement _sceLibcInternalForceTlsDestructor
Co-Authored-By: Claude <noreply@anthropic.com>
2026-10-07 18:18:13 +02:00
Adrià Franch 5b331ed022 feat(libSceAppContent): implement sceAppContentGetAddcontInfo and GetAddcontInfoList
Co-Authored-By: Claude <noreply@anthropic.com>
2026-10-07 18:14:04 +02:00
Adrià Franch 9ab637a575 fix(libkernel): wake infinite equeue waits for timers, document timer choices
Co-Authored-By: Claude <noreply@anthropic.com>
2026-10-07 18:14:04 +02:00
Adrià 2b8f0b215e
Merge pull request #803 from adriadam10/feat/rtc-dos-time
feat(rtc): implement sceRtcGetDosTime and sceRtcSetDosTime
2026-10-07 18:07:20 +02:00
Adrià Franch 0781225d43 fix(rtc): decode the DOS year as unsigned, move TechnicalDebt line
Co-Authored-By: Claude <noreply@anthropic.com>
2026-10-07 18:06:11 +02:00
Adrià Franch c3871dcb99 feat(libSceAudio3d): implement sceAudio3dObjectReserve and sceAudio3dObjectUnreserve 2026-10-07 18:01:24 +02:00
Adrià def8119927
Merge pull request #550 from Pouare514/fix/memory-prot-gpu-bits
fix(libkernel): accept GPU coherency prot bits for host mapping
2026-10-07 17:54:41 +02:00
Adrià 8e281fa8d0
Merge pull request #518 from Pouare514/fix/tlou-videoout
fix(libs): TLOU throwing stubs for VideoOut VrrPeg and VrrStatus
2026-10-07 17:53:38 +02:00
Adrià Franch c94949aedb feat(rtc): implement sceRtcGetDosTime and sceRtcSetDosTime
Co-Authored-By: Claude <noreply@anthropic.com>
2026-10-07 17:52:56 +02:00
Adrià 4e742835c0
Merge pull request #496 from adriadam10/docs/architecture
docs: add architecture overview with Mermaid diagrams
2026-10-07 17:42:12 +02:00
Pouare514 49b2f9e49b docs: record assumed semantics of prot bits 0x100/0x200 2026-10-07 17:29:37 +02:00
Pouare514 0b3dd07ba0 fix(libs): real Vrr names for VideoOut pair, generic Unknown00/01 for the rest 2026-10-07 17:25:07 +02:00
Pouare514 a620a2579d fix(libs): TLOU throwing stubs for VideoOut VrrPeg and VrrStatus 2026-10-07 17:24:59 +02:00
Pouare514 4fcfd3c2b3 feat(prx): stub TextToSpeech2, Vdecsw and Coredump unknown exports 2026-10-07 15:42:04 +02:00
Adrià 8f510f31ab
Merge pull request #1066 from Celegans12/feat/shader-buffer-limit
feat(shader): accept more than 32 buffers per shader up to the device limit
2026-10-07 14:20:34 +02:00
Adrià f8ae5b01b7
Merge pull request #997 from Celegans12/fix/shader-wave64-readlane-host-lanes
fix(shader): throw for constant lane reads outside the host subgroup
2026-10-07 14:08:56 +02:00
Adrià a0fa346f40
Merge pull request #944 from Celegans12/feat/agc-sint-storage-images
feat(agc): implement sint storage images through uint views
2026-10-07 13:56:17 +02:00
Adrià 931109b308
Merge pull request #866 from Celegans12/feat/agc-srgb-load-fallback
feat(agc): implement 8 and 8_8 srgb image loads through unorm views
2026-10-07 13:49:58 +02:00
Adrià c81f573691
Merge pull request #954 from CnRJay/feat/ds-wrxchg2-rtn-b64
feat(shader): implement ds_wrxchg2_rtn_b64 and ds_wrxchg2st64_rtn_b64
2026-10-07 13:44:28 +02:00
Celegans12 6e34e8614e feat(agc): implement sint storage images through uint views
Storage images of a SINT format threw "storage image descriptor uses
an unsupported format"; only write-only 32_SINT was accepted.

The recompiler now writes 16_SINT, 8_8_SINT, 32_SINT, 16_16_SINT,
8_8_8_8_SINT, 32_32_SINT, 16_16_16_16_SINT and 32_32_32_32_SINT
storage images with the Uint numeric class. 8- and 16-bit components
are saturated (EmitFormatStoreComponent) and 32-bit ones stored
unchanged, as measured on RDNA2 (gfx1035); image_store_pck stores
32-bit components unchanged too. The driver binds these surfaces
through a cached view of the same-size UINT format.

8_SINT, 32_32_32_SINT, the packed SINT formats (11_11_10, 10_11_11,
2_10_10_10, 10_10_10_2), D16 stores, packed stores of 8- and 16-bit
components and atomics other than 32-bit ones on 32_SINT and 64-bit
ones on 32_32_SINT still throw. New test: agc_driver_image_store_sint,
with DST_SEL X,Y,0,1 on the two-channel formats, as with X,Y,Z,W the
hardware writes channel 1 from the W data slot (TechnicalDebt).
2026-10-07 11:56:04 +02:00
Celegans12 91852719bf feat(agc): implement 8 and 8_8 srgb image loads through unorm views
NVIDIA 610.62 cannot sample R8G8_SRGB, and lavapipe can sample neither
it nor R8_SRGB, so an 8_8 sRGB T# made an image the device does not
support: creating it crashes the NVIDIA driver and lavapipe loads zeros.

The device's format support is read once. An 8 or 8_8 sRGB texture the
device cannot sample is created and viewed as R8_UNORM or R8G8_UNORM,
and SpirvTarget::srgbDecodeFormats makes the materializer mark the
image, so image loads map every channel through a 256-entry table of
the sRGB EOTF rounded to nearest even at bf16 precision, which is what
RDNA2 (gfx1035) returns; both channels of 8_8 are sRGB, and DST_SEL 0
and 1 map to themselves. Samples and gathers of such an image throw,
and its bindless table entries are unmapped like converted formats.
APS5_SRGB_SHADER_DECODE=1 takes this path on every device. Shader disk
cache entries and keys carry the mark: cache format version 7.
2026-10-07 11:52:08 +02:00
Adrià Franch f1fe7f3678 docs: describe the ds_wrxchg2 b64 forms in the measured b32 entry
Co-Authored-By: Claude <noreply@anthropic.com>
2026-10-07 11:40:52 +02:00
Chad 5582c993e2 feat(shader): implement ds_wrxchg2_rtn_b64 and ds_wrxchg2st64_rtn_b64
DS opcodes 0x6e and 0x6f exchange two qwords at offset0 and offset1
scaled by 8 (st64: 512) and return both old values. Each address is
exchanged with its own 64-bit LDS exchange on the locked 64-bit path.
Equal offsets and a destination past v255 throw, as for the b32 forms;
64-bit GDS throws like the other 64-bit DS atomics.

Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>
2026-10-07 11:40:39 +02:00
Claude 2eebe84f25 feat(agc): accept texel offsets, LOD biases and LOD clamps in color comparison sampling
Comparison sampling of a color texture threw on the _o, _b and _cl
forms and on a sampler LOD bias. The emulation fetches the texels
itself, so the 6-bit offsets of the address are added to the point or
bilinear texel indices, as on the hardware and in Vulkan. The emulation
runs only at level zero or on a single-level view, where an LOD bias or
clamp cannot select another level, so they are accepted with no effect.

Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>
2026-10-07 11:30:00 +02:00
Michon 58eb55dddf test(recompiler): a hand-written look-back kernel instead of the game's; record the dwordx2 loads that can still tear
LookBackScan runs a 43-instruction decoupled look-back written for the
test: one aggregate per block, the block index from an atomic counter,
{flag, value} published with buffer_atomic_swap_x2 and read back with
glc buffer_load_dwordx2. Seven single look-backs and 50 scans of 4096
blocks are checked against a CPU prefix sum; without the recompiler
change the first whole scan fails (3 of 3 runs).

TechnicalDebt records that only glc, aligned, in-bounds dwordx2 loads
in programs with the 64-bit storage view are one atomic load: loads
without glc, and loads in programs without 64-bit buffer atomics, can
still tear against a concurrent swap_x2.
2026-10-07 11:09:04 +02:00
Dean 57e9f0d6aa
Merge pull request #734 from alfalfa-star/feat/ppsa14632-missing-exports
feat(libs): declare the exports PPSA14632 imports that no library provides
2026-10-07 22:00:08 +13:00
alfalfa-star 9df592926b feat(recompiler): implement 64-bit image atomics
image_atomic_* with a two-dword data mask (four for cmpswap) is the
64-bit form of an integer image atomic. The decoder rejected it with
"invalid MIMG data mask". PPSA14632 (Unreal Engine) uses
image_atomic_umax this way in a compute shader during its first frames.

Swap, add, sub, signed and unsigned min/max, and, or, xor and cmpswap
now decode with 64-bit data and translate to new ImageAtomic*64 IR
opcodes. An image updated by them gets its own descriptor binding
range, declared as an R64ui image of 64-bit integers, and the module
uses Int64ImageEXT from SPV_EXT_shader_image_int64. The driver enables
shaderImageInt64Atomics when the device offers it and binds an
R64_UINT view of the 32_32 UINT, SINT or FLOAT surface. Without the
feature, recompiling such a shader throws.

64-bit inc, dec and the float atomics still throw, as does any other
access in the same shader to an image it updates with 64-bit atomics.

The new agc_driver_image_atomics64 test runs every operation on 32_32
UINT, SINT and FLOAT surfaces and checks the returned and stored values
against edge cases across the dword boundary.

Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>
2026-10-07 10:21:32 +02:00
Adrià Franch 9213355711 docs(TechnicalDebt): record measured min/max reduction footprint
Co-Authored-By: Claude <noreply@anthropic.com>
2026-10-07 09:22:02 +02:00
Celegans12 1c5ed6594d feat(shader): accept more than 32 buffers per shader up to the device limit
The resource tracker refused a program's 33rd distinct V# with "buffer
resource limit exceeded". The 32 was a recompiler constant, not a
Vulkan limit: every buffer is one constant-indexed element of the guest
buffers binding, which ShaderResources checks against the device's
storage-buffer limits.

Drop ShaderInfo::MaxBuffers and the tracker's refusal, and size the
SPIR-V emitter's per-buffer offset list from the binding layout. When
the user data and offsets do not fit in the push constants, they all go
to the shader data buffer as before. ShaderResources counted only
storage buffers against maxPerStageResources (200 on Intel UHD) and now
adds the stage's sampled and storage images.

agc_driver_many_buffers reads and writes 52 and 124 buffers, and
agc_driver_graphics rejects buffers plus an image above the limit.
2026-10-07 09:17:47 +02:00
Celegans12 1afcd20281 feat(agc): implement min and max sampler reduction modes
An S# with FILTER_MODE (word0 bits 29-30) set threw in
DecodeSamplerResource. Modes 1 and 2 now map to Vulkan's MIN and MAX
sampler reduction through VK_EXT_sampler_filter_minmax, which the device
enables when it reports both filterMinmax properties; mode 3 throws.

Min/max still throws with anisotropy, a linear mip filter (lavapipe and
NVIDIA disagree there), depth comparison, color-texture compare
emulation, and, in PointFilteredSamplerWord (S# words 0 and 2), when it
filters between texels or mips of an image the recompiler point-samples.
A texture sampled through a linear min/max sampler needs
SAMPLED_IMAGE_FILTER_MINMAX on its view format; the image-sampler pairs
travel in DescriptorBinding::imageSamplers (shader disk cache format 5).

Adds the agc_driver_image_sample_reduction GPU test and extends the
sampler, emulated color compare and disk cache tests.
2026-10-07 09:04:26 +02:00
Adrià db3e659870
Merge pull request #805 from Celegans12/feat/agc-image-10-11-11-unorm
feat(agc): implement 10_11_11 unorm images through 32-bit uint views
2026-10-07 09:00:03 +02:00
Adrià 78b8f058fb
Merge pull request #771 from Kikoarl/feat/sopp-control-flow
feat(shader): decode s_setkill as s_endpgm
2026-10-07 08:50:36 +02:00
Adrià 8a126b7b88
Merge pull request #799 from Celegans12/feat/agc-unnormalized-sampler-coordinates
feat(agc): implement unnormalized sampler coordinates on single-level 1D and 2D views
2026-10-07 08:50:16 +02:00
Adrià Franch c50181f6fa docs(TechnicalDebt): trim s_setkill entry to the measured behaviour
Co-Authored-By: Claude <noreply@anthropic.com>
2026-10-07 08:39:47 +02:00
Kikoarl c8e4a17f89 feat(shader): decode s_setkill as s_endpgm 2026-10-07 08:39:41 +02:00
alfalfa-star e91fe0f063 feat(libs): declare the exports PPSA14632 imports that no library provides
LEGO Horizon Adventures imports 19 functions that no library exports
and no open pull request adds, so it fails eager binding. They are
declared as throwing stubs. The two libSceAjmWVorbis imports have no
known name and are exported by NID from libSceAjm.native.

Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>
2026-10-07 07:10:13 +02:00
alfalfa-star b567bb8eed feat(libkernel): accept the audio coprocessor memory protection bits
A title maps direct memory with protection 0x3f2, which adds bits
0x100 and 0x200 to the CPU, GPU and AMPR bits, and the mapping threw.
They are the audio coprocessor (ACP) read and write bits, as named in
the KytyPS5 and etaHEN headers. The coprocessor work runs on the host
CPU, so they map to host read and read/write access like the GPU bits.

Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>
2026-10-07 07:09:42 +02:00
Dean cb3405d037
Merge pull request #1037 from Raghav314/fix/agc-unwritten-user-data
fix(agc): read unwritten user data registers as zero
2026-10-07 18:00:41 +13:00
Dean b62e84c8ca
Merge pull request #1035 from hugodearaujo/feat/agc-register-defaults-internal
feat(libSceAgc): implement sceAgcGetRegisterDefaultsInternal
2026-10-07 18:00:00 +13:00
Dean ed8dda83ec
Merge pull request #1030 from hugodearaujo/feat/agc-dcb-clear-state
feat(libSceAgc): implement sceAgcDcbClearState
2026-10-07 17:59:18 +13:00
Dean b33ac687c9
Merge pull request #1029 from hugodearaujo/feat/agc-dcb-set-cf-register
feat(libSceAgc): implement sceAgcDcbSetCfRegisterDirect and RangeDirect
2026-10-07 17:58:36 +13:00
Dean 63e02557ef
Merge pull request #1026 from hugodearaujo/feat/agc-wait-reg-mem-patch-mask
feat(libSceAgc): implement sceAgcWaitRegMemPatchMask
2026-10-07 17:57:55 +13:00