..
Amd64OnlyInstructionMatcher.cpp
fix(relinker): lower VRSQRTPS and VRCPPS to correctly rounded results for --to-intel
2026-10-04 14:40:16 +13:00
ClzeroLowering.cpp
feat(relinker): lower CLZERO for --to-intel
2026-10-01 12:30:35 +02:00
ClzeroOperands.cpp
fix(relinker): ignore a REX prefix that is followed by another prefix
2026-10-01 13:09:11 +02:00
DecodedInstruction.cpp
feat(relinker): lower SHA-1 instructions for --to-intel
2026-10-03 07:40:41 +02:00
ReciprocalLowering.cpp
fix(relinker): lower VRSQRTPS and VRCPPS to correctly rounded results for --to-intel
2026-10-04 14:40:16 +13:00
ReciprocalOperands.cpp
fix(relinker): lower VRSQRTPS and VRCPPS to correctly rounded results for --to-intel
2026-10-04 14:40:16 +13:00
Sha1Lowering.cpp
feat(relinker): lower SHA-1 instructions with a memory operand
2026-10-05 02:02:13 +02:00
Sha1Operands.cpp
feat(relinker): lower SHA-1 instructions with a memory operand
2026-10-05 02:02:13 +02:00
Sha256Lowering.cpp
feat(relinker): lower SHA-256 instructions with a memory operand
2026-10-04 08:21:40 +02:00
Sha256Operands.cpp
feat(relinker): lower SHA-256 instructions with a memory operand
2026-10-04 08:21:40 +02:00
Sse4aLowering.cpp
fix(relinker): zero dst[127:64] in EXTRQ and INSERTQ lowerings
2026-10-03 08:21:33 +02:00
Sse4aOperands.cpp
fix(relinker): ignore a REX prefix that is followed by another prefix
2026-10-01 13:09:11 +02:00
StubBodyBuilder.cpp
feat(relinker): lower SHA-1 instructions with a memory operand
2026-10-05 02:02:13 +02:00
X64InstructionDecoder.cpp
fix(relinker): report RIP-relative operands of VEX, EVEX and 0F38/0F3A instructions
2026-10-03 08:10:29 +02:00
X64InstructionRewriter.cpp
fix(relinker): ignore a REX prefix that is followed by another prefix
2026-10-01 13:09:11 +02:00