460 lines
27 KiB
C++
460 lines
27 KiB
C++
#include "prx/libSceAgc/Command/include/Packet.hpp"
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#include "prx/libSceAgc/Command/include/Memory.hpp"
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#include "prx/libSceAgc/Command/include/RegisterDefaults.hpp"
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#include "prx/libc/include/Shutdown.hpp"
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#include <algorithm>
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#include <array>
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#include <cstdio>
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#include <stdexcept>
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#include <cstring>
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#include <string>
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extern "C" std::uint32_t* APS5_VABI sceAgcDcbResetQueue(CommandBuffer* buf, std::uint32_t op, std::uint32_t state);
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extern "C" std::uint32_t* APS5_VABI sceAgcDcbClearState(CommandBuffer* buf, std::uint32_t command);
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extern "C" std::uint32_t* APS5_VABI sceAgcDcbSetFlip(CommandBuffer* buf, std::uint32_t handle, std::int32_t index, std::uint32_t mode, std::int64_t argument);
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extern "C" int APS5_VABI sceAgcSuspendPoint();
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extern "C" int APS5_VABI sceAgcInit(std::uint32_t version);
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extern "C" void* APS5_VABI sceAgcGetRegisterDefaults();
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extern "C" void* APS5_VABI sceAgcGetRegisterDefaultsInternal();
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extern "C" void* APS5_VABI sceAgcGetRegisterDefaults2Internal(std::uint32_t version);
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extern "C" int APS5_VABI sceAgcInit_0090(std::uint32_t* state, std::uint32_t version);
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extern "C" std::uint32_t* APS5_VABI sceAgcDcbDrawIndexAuto(CommandBuffer* buf, std::uint32_t indexCount, std::uint64_t modifier);
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extern "C" std::uint32_t* APS5_VABI sceAgcDcbDrawIndexIndirect(CommandBuffer* buf, std::uint32_t dataOffsetInBytes, std::uint64_t modifier);
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extern "C" std::uint32_t* APS5_VABI sceAgcDcbDrawIndexIndirectMulti(CommandBuffer* buf, std::uint32_t dataOffsetInBytes, std::uint32_t countIndirect, std::uint32_t maxCountOrCount, const volatile void* countAddress, std::uint32_t strideInBytes, std::uint64_t modifier);
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extern "C" int APS5_VABI sceAgcWaitRegMemPatchReference(std::uint32_t* cmd, std::uint64_t reference);
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extern "C" int APS5_VABI sceAgcWaitRegMemPatchMask(std::uint32_t* cmd, std::uint64_t mask);
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extern "C" int APS5_VABI sceAgcGetDataPacketPayloadAddress_0090(std::uint32_t** addr, std::uint32_t* cmd, int type);
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extern "C" std::uint32_t* APS5_VABI sceAgcCbSetShRegisterRangeDirect(CommandBuffer* buf, std::uint32_t offset, const std::uint32_t* values, std::uint32_t numValues);
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extern "C" std::uint32_t* APS5_VABI sceAgcDcbContextStateOp_0100(CommandBuffer* buf, std::uint32_t operation);
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extern "C" std::uint32_t* APS5_VABI sceAgcDcbPushMarker(CommandBuffer* buf, const char* str, std::uint32_t color);
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extern "C" std::uint32_t* APS5_VABI sceAgcDcbPopMarker(CommandBuffer* buf);
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extern "C" std::uint32_t* APS5_VABI sceAgcDcbSetMarker(CommandBuffer* buf, const char* str, std::uint32_t color);
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extern "C" std::uint32_t* APS5_VABI sceAgcAcbPushMarker(CommandBuffer* buf, const char* str, std::uint32_t color);
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extern "C" std::uint32_t* APS5_VABI sceAgcAcbPopMarker(CommandBuffer* buf);
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extern "C" std::uint32_t* APS5_VABI sceAgcAcbSetMarker(CommandBuffer* buf, const char* str, std::uint32_t color);
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extern "C" std::uint32_t* APS5_VABI sceAgcDcbSetIndexBuffer(CommandBuffer* buf, std::uint64_t indexAddress);
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extern "C" std::uint32_t* APS5_VABI sceAgcDcbSetBaseIndirectArgs(CommandBuffer* buf, std::uint32_t shaderType, const volatile void* indirectBaseAddr);
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extern "C" std::uint32_t* APS5_VABI sceAgcSetNop(CommandBuffer* buf, std::uint32_t sizeDw);
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namespace {
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void check(bool condition, const char* message) {
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if (!condition) {
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throw std::runtime_error(message);
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}
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}
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template <typename TAction>
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void expectFailure(TAction action) {
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try {
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action();
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} catch (const std::runtime_error& error) {
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check(error.what()[0] != '\0', "empty exception message");
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return;
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}
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throw std::runtime_error("expected an exception");
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}
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struct Storage {
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std::array<std::uint32_t, 64> words{};
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CommandBuffer buffer{words.data(), words.data() + words.size(), words.data(), words.data() + words.size(), nullptr, nullptr, 0};
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};
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bool APS5_VABI grow(CommandBuffer* buffer, std::uint32_t count, void* userData) {
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auto& storage = *static_cast<Storage*>(userData);
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check(count == 5, "incorrect callback allocation including reserved words");
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buffer->bottom = storage.words.data();
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buffer->top = storage.words.data() + storage.words.size();
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buffer->cursor_up = buffer->bottom;
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buffer->cursor_down = buffer->top;
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return true;
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}
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bool APS5_VABI growReserved(CommandBuffer* buffer, std::uint32_t count, void* userData) {
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auto& storage = *static_cast<Storage*>(userData);
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check(count == 5 + 4, "incorrect callback allocation including reserved words");
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buffer->bottom = storage.words.data();
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buffer->top = storage.words.data() + storage.words.size();
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buffer->cursor_up = buffer->bottom;
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buffer->cursor_down = buffer->top;
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return true;
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}
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void testPackets() {
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Storage storage;
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sceAgcDcbResetQueue(&storage.buffer, 0, 3);
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sceAgcDcbDrawIndexAuto(&storage.buffer, 17, 0);
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const std::array<std::uint32_t, 5> expected{0xc0001200u, 3, 0xc0012d00u, 17, 2};
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check(std::equal(expected.begin(), expected.end(), storage.words.begin()), "reset or draw packet mismatch");
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check(storage.buffer.cursor_up == storage.words.data() + expected.size(), "incorrect packet cursor advance");
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const auto before = storage.words;
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expectFailure([&] { sceAgcDcbResetQueue(&storage.buffer, 0, 16); });
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check(storage.words == before, "invalid reset modified packet memory");
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Storage destination;
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CommandBuffer empty{nullptr, nullptr, nullptr, nullptr, grow, &destination, 0};
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Agc::Command::Emit(&empty, 0x15u, {1, 1, 1, 0x41u}, __func__);
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check(empty.cursor_up == destination.words.data() + 5, "guest ABI allocation callback failed");
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Storage reservedDestination;
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CommandBuffer reserved{nullptr, nullptr, nullptr, nullptr, growReserved, &reservedDestination, 4};
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Agc::Command::Emit(&reserved, 0x15u, {1, 1, 1, 0x41u}, __func__);
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check(reserved.cursor_up == reservedDestination.words.data() + 5, "buffer with less room than its reserved words did not grow");
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Storage exhausted;
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exhausted.buffer.cursor_down = exhausted.words.data() + 2;
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expectFailure([&] { Agc::Command::WriteNop(&exhausted.buffer, 3, __func__); });
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check(exhausted.buffer.cursor_up == exhausted.words.data(), "failed allocation advanced cursor");
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std::array<std::uint32_t, 8> scratch{};
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CommandBuffer noDown{scratch.data(), scratch.data() + scratch.size(), scratch.data(), nullptr, nullptr, nullptr, 0};
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Agc::Command::WriteNop(&noDown, 6, __func__);
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check(noDown.cursor_up == scratch.data() + 6, "buffer without a down cursor did not use its top as the limit");
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expectFailure([&] { Agc::Command::WriteNop(&noDown, 3, __func__); });
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check(noDown.cursor_up == scratch.data() + 6, "allocation past the top of a buffer without a down cursor advanced its cursor");
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}
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void testNop() {
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Storage storage;
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storage.words.fill(0xdeadbeefu);
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auto* single = sceAgcSetNop(&storage.buffer, 1);
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auto* pair = sceAgcSetNop(&storage.buffer, 2);
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auto* triple = sceAgcSetNop(&storage.buffer, 3);
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const std::array<std::uint32_t, 7> expected{0xffff1000u, 0xc0001000u, 0, 0xc0011000u, 0, 0, 0xdeadbeefu};
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check(single == storage.words.data() && pair == single + 1 && triple == pair + 2, "incorrect NOP placement");
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check(std::equal(expected.begin(), expected.end(), storage.words.begin()), "incorrect NOP packet");
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check(storage.buffer.cursor_up == storage.words.data() + 6, "incorrect NOP cursor advance");
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expectFailure([&] { sceAgcSetNop(&storage.buffer, 0); });
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expectFailure([&] { sceAgcSetNop(&storage.buffer, 0x4002u); });
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check(storage.buffer.cursor_up == storage.words.data() + 6, "invalid NOP advanced the cursor");
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}
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void testClearState() {
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Storage storage;
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storage.words.fill(0xdeadbeefu);
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for (std::uint32_t command = 0; command <= 0xfu; ++command) {
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auto* packet = sceAgcDcbClearState(&storage.buffer, command);
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check(packet == storage.words.data() + command * 2 && packet[0] == 0xc0001200u && packet[1] == command, "incorrect CLEAR_STATE packet");
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}
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check(storage.buffer.cursor_up == storage.words.data() + 32 && storage.words[32] == 0xdeadbeefu, "incorrect CLEAR_STATE cursor advance");
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const auto before = storage.words;
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expectFailure([&] { sceAgcDcbClearState(&storage.buffer, 0x10u); });
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expectFailure([&] { sceAgcDcbClearState(&storage.buffer, 0xffffffffu); });
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expectFailure([] { sceAgcDcbClearState(nullptr, 0); });
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check(storage.words == before && storage.buffer.cursor_up == storage.words.data() + 32, "invalid CLEAR_STATE modified the buffer");
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}
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struct ContextGrowth {
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Storage destination;
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std::uint32_t* expectedCursor;
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std::uint32_t expectedCount;
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std::uint32_t calls = 0;
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bool success = true;
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};
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bool APS5_VABI growContext(CommandBuffer* buffer, std::uint32_t count, void* userData) {
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auto& growth = *static_cast<ContextGrowth*>(userData);
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check(++growth.calls == 1, "unexpected repeated context allocation callback");
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check(buffer->cursor_up == growth.expectedCursor, "context callback at wrong packet boundary");
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check(count == growth.expectedCount, "incorrect context reservation size");
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if (!growth.success) {
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return false;
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}
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buffer->bottom = growth.destination.buffer.bottom;
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buffer->top = growth.destination.buffer.top;
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buffer->cursor_up = growth.destination.buffer.cursor_up;
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buffer->cursor_down = growth.destination.buffer.cursor_down;
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return true;
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}
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void testIndexedIndirectDraws() {
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Storage storage;
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const auto* single = sceAgcDcbDrawIndexIndirect(&storage.buffer, 0x40, 0);
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const std::array<std::uint32_t, 5> expectedSingle{0xc0032500u, 0x40, 0x280, 0x280, 0};
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check(single == storage.words.data() && std::equal(expectedSingle.begin(), expectedSingle.end(), single), "indexed indirect draw packet mismatch");
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alignas(4) std::uint32_t count = 0;
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const auto* multi = sceAgcDcbDrawIndexIndirectMulti(&storage.buffer, 0x80, 1, 8, &count, 20, 0);
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const auto address = reinterpret_cast<std::uintptr_t>(&count);
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const std::array<std::uint32_t, 10> expectedMulti{0xc0083800u, 0x80, 0x280, 0x280, 0x40000280u, 8, static_cast<std::uint32_t>(address), static_cast<std::uint32_t>(address >> 32u), 20, 0};
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check(multi == storage.words.data() + expectedSingle.size() && std::equal(expectedMulti.begin(), expectedMulti.end(), multi), "indexed indirect multi draw packet mismatch");
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check(storage.buffer.cursor_up == storage.words.data() + expectedSingle.size() + expectedMulti.size(), "incorrect indexed indirect cursor advance");
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const auto before = storage.words;
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expectFailure([&] { sceAgcDcbDrawIndexIndirect(&storage.buffer, 2, 0); });
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expectFailure([&] { sceAgcDcbDrawIndexIndirectMulti(&storage.buffer, 0, 1, 8, &count, 16, 0); });
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expectFailure([&] { sceAgcDcbDrawIndexIndirectMulti(&storage.buffer, 0, 0, 8, &count, 20, 0); });
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check(storage.words == before, "invalid indexed indirect draw modified packet memory");
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}
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void testMarkers() {
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Storage dcb;
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Storage acb;
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const auto* dcbPush = sceAgcDcbPushMarker(&dcb.buffer, "frame", 0xff0000u);
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const auto* acbPush = sceAgcAcbPushMarker(&acb.buffer, "frame", 0x00ff00u);
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check(acbPush == acb.words.data() && acbPush[0] == Agc::Command::Header(0x10, 3, 0x0bu << 2u), "ACB push marker header mismatch");
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check(std::strcmp(reinterpret_cast<const char*>(acbPush + 1), "frame") == 0, "ACB push marker text mismatch");
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const auto* acbPop = sceAgcAcbPopMarker(&acb.buffer);
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check(acbPop == acb.words.data() + 3 && acbPop[0] == Agc::Command::Header(0x10, 2, 0x0cu << 2u) && acbPop[1] == 0, "ACB pop marker mismatch");
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sceAgcDcbPopMarker(&dcb.buffer);
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const auto* acbSet = sceAgcAcbSetMarker(&acb.buffer, nullptr, 0);
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const auto* dcbSet = sceAgcDcbSetMarker(&dcb.buffer, nullptr, 0);
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check(acbSet == acb.words.data() + 5 && dcbSet == dcb.words.data() + 5, "set marker did not return its push packet");
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check(acbSet[0] == Agc::Command::Header(0x10, 2, 0x0bu << 2u) && acbSet[1] == 0 && acbSet[2] == Agc::Command::Header(0x10, 2, 0x0cu << 2u), "ACB set marker is not a push and pop pair");
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check(dcbPush == dcb.words.data() && dcb.words == acb.words, "ACB and DCB markers differ");
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check(acb.buffer.cursor_up == acb.words.data() + 9, "incorrect ACB marker cursor advance");
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expectFailure([] { sceAgcAcbPushMarker(nullptr, "frame", 0); });
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expectFailure([] { sceAgcAcbPopMarker(nullptr); });
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expectFailure([] { sceAgcAcbSetMarker(nullptr, "frame", 0); });
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}
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void testIndexBuffer() {
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Storage storage;
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alignas(4) std::uint16_t indices[2]{};
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const auto address = reinterpret_cast<std::uintptr_t>(indices);
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const auto* bound = sceAgcDcbSetIndexBuffer(&storage.buffer, address);
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check(bound[1] == static_cast<std::uint32_t>(address) && bound[2] == static_cast<std::uint32_t>(address >> 32u), "index buffer address mismatch");
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const auto* unbound = sceAgcDcbSetIndexBuffer(&storage.buffer, 0);
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check(unbound == bound + 3 && unbound[0] == bound[0] && unbound[1] == 0 && unbound[2] == 0, "index buffer was not unbound");
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const auto before = storage.words;
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try {
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sceAgcDcbSetIndexBuffer(&storage.buffer, 0x1001);
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} catch (const std::runtime_error& error) {
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check(std::string(error.what()).find("0x1001") != std::string::npos, "misaligned index buffer error omits the address");
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check(storage.words == before, "misaligned index buffer modified packet memory");
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return;
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}
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throw std::runtime_error("misaligned index buffer was accepted");
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}
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void testIndirectBase() {
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Storage storage;
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alignas(8) std::uint32_t arguments[4]{};
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const auto address = reinterpret_cast<std::uintptr_t>(arguments);
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const auto* bound = sceAgcDcbSetBaseIndirectArgs(&storage.buffer, 0, arguments);
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check(bound[1] == 1 && bound[2] == static_cast<std::uint32_t>(address) && bound[3] == static_cast<std::uint32_t>(address >> 32u), "indirect base address mismatch");
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const auto* cleared = sceAgcDcbSetBaseIndirectArgs(&storage.buffer, 1, nullptr);
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check(cleared == bound + 4 && (cleared[0] & 2u) != 0 && cleared[1] == 1 && cleared[2] == 0 && cleared[3] == 0, "indirect base was not cleared");
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const auto before = storage.words;
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expectFailure([&] { sceAgcDcbSetBaseIndirectArgs(&storage.buffer, 0, reinterpret_cast<const volatile void*>(address + 4)); });
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check(storage.words == before, "misaligned indirect base modified packet memory");
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}
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void testContextState() {
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const std::array<std::array<std::uint32_t, 6>, 4> sizes{{{5}, {5, 8, 9, 3, 2}, {3, 5, 8, 9, 2}, {5, 8, 9, 3, 2, 5}}};
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const std::array<std::array<std::uint32_t, 4>, 4> reservations{{{5}, {22, 3, 2}, {3, 22, 2}, {22, 3, 2, 5}}};
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const std::array<std::uint32_t, 4> totals{5, 27, 27, 32};
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for (std::uint32_t operation = 0; operation < sizes.size(); ++operation) {
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for (std::uint32_t capacity = 0; capacity <= totals[operation]; ++capacity) {
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Storage source;
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source.words.fill(0xdeadbeefu);
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std::uint32_t split = 0;
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std::uint32_t requested = 0;
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for (const auto count : reservations[operation]) {
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if (count > capacity - split) {
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requested = count;
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break;
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}
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split += count;
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}
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ContextGrowth growth{{}, source.words.data() + split, requested + 2};
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growth.destination.words.fill(0xdeadbeefu);
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source.buffer.cursor_down = source.words.data() + capacity + 2;
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source.buffer.reserved_dw = 2;
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source.buffer.callback = growContext;
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source.buffer.user_data = &growth;
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auto* first = sceAgcDcbContextStateOp_0100(&source.buffer, operation);
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check(first == (split == 0 ? growth.destination.words.data() : source.words.data()), "incorrect first context packet address");
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check(growth.calls == (requested == 0 ? 0u : 1u), "incorrect context callback count");
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auto* end = requested == 0 ? source.words.data() + totals[operation] : growth.destination.words.data() + totals[operation] - split;
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check(source.buffer.cursor_up == end, "incorrect context cursor advance");
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check(*end == 0xdeadbeefu && source.words[split] == 0xdeadbeefu, "context allocation overwrote adjacent memory");
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std::uint32_t offset = 0;
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for (const auto count : sizes[operation]) {
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if (count == 0) {
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break;
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}
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const auto* packet = offset < split ? source.words.data() + offset : growth.destination.words.data() + offset - split;
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const auto header = 0xc0001000u | ((count - 2u) << 16u) | (offset == 0 ? 0x68u : 0u);
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check(packet[0] == header, "incorrect context packet header");
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for (std::uint32_t i = 1; i < count; ++i) {
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check(packet[i] == (offset == 0 && i == 1 ? operation : 0u), "incorrect context packet payload");
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}
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offset += count;
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}
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}
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}
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expectFailure([] { sceAgcDcbContextStateOp_0100(nullptr, 0); });
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Storage invalid;
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expectFailure([&] { sceAgcDcbContextStateOp_0100(&invalid.buffer, 4); });
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check(invalid.buffer.cursor_up == invalid.words.data(), "invalid context operation advanced cursor");
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invalid.buffer.cursor_up = invalid.words.data() + 1;
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invalid.buffer.cursor_down = invalid.words.data();
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expectFailure([&] { sceAgcDcbContextStateOp_0100(&invalid.buffer, 0); });
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invalid.buffer.cursor_up = invalid.words.data();
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expectFailure([&] { sceAgcDcbContextStateOp_0100(&invalid.buffer, 1); });
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ContextGrowth growth{{}, invalid.words.data(), 22};
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invalid.buffer.callback = growContext;
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invalid.buffer.user_data = &growth;
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growth.success = false;
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expectFailure([&] { sceAgcDcbContextStateOp_0100(&invalid.buffer, 1); });
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growth.calls = 0;
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growth.success = true;
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growth.destination.buffer.cursor_down = growth.destination.words.data() + 21;
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expectFailure([&] { sceAgcDcbContextStateOp_0100(&invalid.buffer, 1); });
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check(invalid.buffer.cursor_up == growth.destination.words.data(), "failed reservation advanced cursor");
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}
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void testFlip() {
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Storage storage;
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storage.words.fill(0xdeadbeefu);
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auto* packet = sceAgcDcbSetFlip(&storage.buffer, 0xfedcba98u, -2, 0x12345678u, -0x123456789abcdefLL);
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const std::array<std::uint32_t, 6> expected{0xc004105cu, 0xfedcba98u, 0xfffffffeu, 0x12345678u, 0x76543211u, 0xfedcba98u};
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check(packet == storage.words.data(), "flip returned wrong packet address");
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check(std::equal(expected.begin(), expected.end(), packet), "flip packet lost argument bits");
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check(storage.buffer.cursor_up == packet + 6 && packet[6] == 0xdeadbeefu, "flip packet overran allocation");
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expectFailure([] { sceAgcDcbSetFlip(nullptr, 1, 0, 1, 0); });
|
|
Storage exhausted;
|
|
exhausted.buffer.cursor_down = exhausted.words.data() + 5;
|
|
expectFailure([&] { sceAgcDcbSetFlip(&exhausted.buffer, 1, 0, 1, 0); });
|
|
check(exhausted.buffer.cursor_up == exhausted.words.data(), "failed flip allocation advanced cursor");
|
|
check(sceAgcSuspendPoint() == 0, "empty suspend failed");
|
|
}
|
|
|
|
void testRegisters() {
|
|
Storage storage;
|
|
const std::array<ShaderRegister, 3> registers{{{0x10, 7}, {0x11, 8}, {0x20, 9}}};
|
|
Agc::Command::WriteRegisters(&storage.buffer, 0x76u, registers.data(), registers.size(), true, __func__);
|
|
const std::array<std::uint32_t, 7> expected{0xc0027600u, 0x10, 7, 8, 0xc0017600u, 0x20, 9};
|
|
check(std::equal(expected.begin(), expected.end(), storage.words.begin()), "register run packet mismatch");
|
|
auto* packet = Agc::Command::WriteIndirectRegisters(&storage.buffer, 0x63u, registers.data(), 0x3ffeu, __func__);
|
|
Agc::Command::PatchIndirectCount(packet, 0x63u, 1, __func__);
|
|
check(packet[4] == 0x3fffu, "indirect register count mismatch");
|
|
const auto before = storage.words;
|
|
expectFailure([&] { Agc::Command::PatchIndirectCount(packet, 0x63u, 1, __func__); });
|
|
expectFailure([&] { Agc::Command::PatchIndirectAddress(packet, 0x64u, registers.data(), __func__); });
|
|
check(storage.words == before, "invalid indirect patch modified memory");
|
|
}
|
|
|
|
void testRegisterRange() {
|
|
Storage storage;
|
|
storage.words.fill(0xdeadbeefu);
|
|
auto* packet = sceAgcCbSetShRegisterRangeDirect(&storage.buffer, 0x8c, nullptr, 4);
|
|
auto expected = storage.words;
|
|
expected.fill(0xdeadbeefu);
|
|
expected[0] = 0xc0047600u;
|
|
expected[1] = 0x8c;
|
|
check(packet == storage.words.data(), "incorrect register range packet address");
|
|
check(storage.buffer.cursor_up == storage.words.data() + 6, "incorrect register range allocation");
|
|
check(storage.words == expected, "null register values modified payload or adjacent memory");
|
|
const std::array<std::uint32_t, 4> values{1, 2, 3, 4};
|
|
packet = sceAgcCbSetShRegisterRangeDirect(&storage.buffer, 0x90, values.data(), values.size());
|
|
expected[6] = 0xc0047600u;
|
|
expected[7] = 0x90;
|
|
std::copy(values.begin(), values.end(), expected.begin() + 8);
|
|
check(packet == storage.words.data() + 6 && storage.buffer.cursor_up == storage.words.data() + 12, "incorrect populated register range allocation");
|
|
check(storage.words == expected, "register values were not copied correctly");
|
|
const auto* misaligned = reinterpret_cast<const std::uint32_t*>(reinterpret_cast<const unsigned char*>(values.data()) + 1);
|
|
expectFailure([&] { sceAgcCbSetShRegisterRangeDirect(&storage.buffer, 0x8c, misaligned, 4); });
|
|
check(storage.words == expected && storage.buffer.cursor_up == storage.words.data() + 12, "misaligned register values modified command buffer");
|
|
}
|
|
|
|
void testPacketPayloadAddress() {
|
|
Storage storage;
|
|
auto* packet = sceAgcCbSetShRegisterRangeDirect(&storage.buffer, 0x8c, nullptr, 4);
|
|
std::uint32_t* payload = nullptr;
|
|
check(sceAgcGetDataPacketPayloadAddress_0090(&payload, packet, 1) == 0 && payload == packet + 2, "incorrect register packet payload address");
|
|
const std::array<std::uint32_t, 4> values{11, 22, 33, 44};
|
|
std::copy(values.begin(), values.end(), payload);
|
|
const std::array<std::uint32_t, 6> expected{0xc0047600u, 0x8c, 11, 22, 33, 44};
|
|
check(std::equal(expected.begin(), expected.end(), packet), "payload write corrupted register packet");
|
|
check(sceAgcGetDataPacketPayloadAddress_0090(&payload, packet, 0) == 0 && payload == packet + 1, "incorrect generic packet payload address");
|
|
packet[0] = 0xffff1000u;
|
|
check(sceAgcGetDataPacketPayloadAddress_0090(&payload, packet, 0) == 0 && payload == nullptr, "empty payload marker was not recognized");
|
|
check(sceAgcGetDataPacketPayloadAddress_0090(&payload, packet, -1) == 0 && payload == packet + 2, "nonzero payload type did not skip two words");
|
|
expectFailure([&] { sceAgcGetDataPacketPayloadAddress_0090(nullptr, packet, 1); });
|
|
expectFailure([&] { sceAgcGetDataPacketPayloadAddress_0090(&payload, nullptr, 1); });
|
|
auto* misaligned = reinterpret_cast<std::uint32_t*>(reinterpret_cast<unsigned char*>(packet) + 1);
|
|
expectFailure([&] { sceAgcGetDataPacketPayloadAddress_0090(&payload, misaligned, 0); });
|
|
check(payload == packet + 2, "invalid packet changed output address");
|
|
}
|
|
|
|
void testMemory() {
|
|
Storage storage;
|
|
Agc::Command::WriteDma(&storage.buffer, false, 1, 0, 0, 0x2000, 2, 0, 0x12345678, 16, 0, 1, 1, __func__);
|
|
const std::array<std::uint32_t, 7> expected{0xc0055000u, 0xc0000001u, 0x12345678, 0, 0x2000, 0, 0x80000010u};
|
|
check(std::equal(expected.begin(), expected.end(), storage.words.begin()), "DMA packet mismatch");
|
|
std::uint64_t value = 0;
|
|
auto* packet = Agc::Command::WriteWait(&storage.buffer, 1, 3, 0, 0, &value, 0x1122334455667788ull, 0xffffffffffffffffull, 32, __func__);
|
|
check(packet[0] == 0xc0027901u && packet[4] == 0xc0079300u && packet[5] == 0x13u, "wait packet header mismatch");
|
|
check(packet[8] == 0x55667788u && packet[9] == 0x11223344u && packet[12] == 2u, "wait reference or poll interval mismatch");
|
|
sceAgcWaitRegMemPatchReference(packet, 7);
|
|
check(packet[8] == 7 && packet[9] == 0x11223344u, "reference patch changed the high word");
|
|
const auto before = storage.words;
|
|
expectFailure([&] { sceAgcWaitRegMemPatchReference(packet, 0x100000000ull); });
|
|
check(storage.words == before, "invalid memory operation modified packet memory");
|
|
auto* truncated = Agc::Command::WriteWait(&storage.buffer, 0, 3, 0, 0, &value, 0x100000000ull, 0xffffffff00000001ull, 32, __func__);
|
|
check(truncated[8] == 0u && truncated[9] == 1u, "32-bit wait did not keep the low halves of the reference and mask");
|
|
sceAgcWaitRegMemPatchMask(packet, 0x0f0f0f0fu);
|
|
check(packet[10] == 0x0f0f0f0fu && packet[11] == 0xffffffffu && packet[8] == 7, "64-bit mask patch changed the wrong word");
|
|
sceAgcWaitRegMemPatchMask(truncated, 0xff00u);
|
|
check(truncated[9] == 0xff00u && truncated[8] == 0u && truncated[10] == 2u, "32-bit mask patch changed the wrong word");
|
|
const auto beforeMask = storage.words;
|
|
expectFailure([&] { sceAgcWaitRegMemPatchMask(packet, 0x100000000ull); });
|
|
expectFailure([&] { sceAgcWaitRegMemPatchMask(truncated, 0x100000000ull); });
|
|
expectFailure([&] { sceAgcWaitRegMemPatchMask(packet + 4, 1); });
|
|
check(storage.words == beforeMask, "invalid mask patch modified packet memory");
|
|
}
|
|
|
|
void testDefaults() {
|
|
std::uint32_t state = 0x12345678;
|
|
check(sceAgcInit_0090(&state, 8) == 0 && state == 0x12345678, "AGC initialization failed or modified caller state");
|
|
check(sceAgcInit_0090(&state, 13) == 0 && state == 0x12345678, "AGC version 13 initialization changed caller state");
|
|
expectFailure([] { sceAgcInit_0090(nullptr, 8); });
|
|
expectFailure([&] { sceAgcInit_0090(&state, 14); });
|
|
check(sceAgcInit(8) == 0, "AGC version initialization failed");
|
|
expectFailure([] { sceAgcInit(14); });
|
|
expectFailure([] { sceAgcInit(0xffffffffu); });
|
|
for (std::uint32_t version = 0; version < 14; ++version) {
|
|
for (const bool internal : {false, true}) {
|
|
auto* first = Agc::Command::GetRegisterDefaults(version, internal, __func__);
|
|
check(first != nullptr && first == Agc::Command::GetRegisterDefaults(version, internal, __func__), "unstable register defaults pointer");
|
|
}
|
|
}
|
|
auto* internalDefaults = sceAgcGetRegisterDefaultsInternal();
|
|
check(internalDefaults != nullptr && internalDefaults == Agc::Command::GetRegisterDefaults(0, true, __func__) && internalDefaults == sceAgcGetRegisterDefaults2Internal(0), "internal register defaults are not the baseline internal table");
|
|
check(internalDefaults != sceAgcGetRegisterDefaults(), "internal register defaults returned the public table");
|
|
expectFailure([] { Agc::Command::GetRegisterDefaults(14, false, __func__); });
|
|
expectFailure([] { Agc::Command::GetRegisterDefaults(0xffffffffu, true, __func__); });
|
|
}
|
|
|
|
}
|
|
|
|
int main(int argc, char** argv) {
|
|
try {
|
|
if (argc == 2 && std::strcmp(argv[1], "defaults") == 0) {
|
|
testDefaults();
|
|
LibcRunShutdown_nid_postfix();
|
|
std::puts("AGC initialization tests passed");
|
|
return 0;
|
|
}
|
|
testPackets();
|
|
testNop();
|
|
testClearState();
|
|
testIndexedIndirectDraws();
|
|
testMarkers();
|
|
testIndexBuffer();
|
|
testIndirectBase();
|
|
testContextState();
|
|
testFlip();
|
|
testRegisters();
|
|
testRegisterRange();
|
|
testPacketPayloadAddress();
|
|
testMemory();
|
|
testDefaults();
|
|
LibcRunShutdown_nid_postfix();
|
|
std::puts("AGC command tests passed");
|
|
return 0;
|
|
} catch (const std::exception& error) {
|
|
std::fprintf(stderr, "%s\n", error.what());
|
|
try { LibcRunShutdown_nid_postfix(); }
|
|
catch (const std::exception& shutdown) { std::fprintf(stderr, "shutdown: %s\n", shutdown.what()); }
|
|
return 1;
|
|
}
|
|
}
|