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overlordxrz-source f4ef1cd6ec fix(relinker): do not add the F6/F7 TEST immediate to EVEX instructions 
The decoder adds the TEST immediate of opcodes F6 and F7 when ModRM.reg
is 0 or 1. The check excluded VEX and two-byte opcodes but not EVEX, so
an EVEX.0F F6 (VPSADBW) whose ModRM.reg is 0 or 1 was given an extra
imm8 and decoded one byte too long. VPSADBW has no immediate (Intel SDM
Vol. 2B, VPSADBW).
 		2026-10-07 18:51:05 -04:00
..
include/codegen feat(relinker): lower SHA-1 instructions with a memory operand 2026-10-05 02:02:13 +02:00
src fix(relinker): do not add the F6/F7 TEST immediate to EVEX instructions 2026-10-07 18:51:05 -04:00
tests fix(relinker): do not add the F6/F7 TEST immediate to EVEX instructions 2026-10-07 18:51:05 -04:00