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graphics: derive compute wave size from dispatch mode

This commit is contained in:
Senaxx 2026-08-19 19:41:18 +02:00 committed by nmzik
parent 69156b2f0e
commit a42e3bb09e
7 changed files with 22 additions and 27 deletions
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4
src/graphics/guest_gpu/command_processor/pm4Handlers.cpp
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@ -1360,10 +1360,6 @@ static void HwShSetCsRegister(CommandProcessor& cp, uint32_t cmd_offset, uint32_
Pm4::COMPUTE_PGM_RSRC1_BULKY_MASK) != 0u;
cs_regs.threadgroup_configuration = ((value >> Pm4::COMPUTE_PGM_RSRC1_WGP_MODE_SHIFT) &
Pm4::COMPUTE_PGM_RSRC1_WGP_MODE_MASK) != 0u;
cs_regs.wave_size = (((value >> Pm4::COMPUTE_PGM_RSRC1_W32_EN_SHIFT) &
Pm4::COMPUTE_PGM_RSRC1_W32_EN_MASK) != 0u)
? 32u
: 64u;
break;
case Pm4::COMPUTE_PGM_RSRC2:
cs_regs.scratch_en = ((value >> Pm4::COMPUTE_PGM_RSRC2_SCRATCH_EN_SHIFT) &

2
src/graphics/guest_gpu/graphicsRun.cpp
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@ -1108,6 +1108,8 @@ void CommandProcessor::DrawIndirectMulti(uint32_t data_offset, uint32_t max_coun
void CommandProcessor::DispatchDirect(uint32_t thread_group_x, uint32_t thread_group_y,
uint32_t thread_group_z, uint32_t mode) {
m_sh_ctx.SetCsWaveSize(Pm4::ComputeWaveSize(mode));
uint32_t frame_num = 0;
// uint32_t local_x = 1;
// uint32_t local_y = 1;

1
src/graphics/guest_gpu/hardwareContext.h
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@ -1089,6 +1089,7 @@ public:
void SetPsShaderChksum(uint32_t value) { m_ps.ps_regs.chksum = value; }
void SetCsShader(const CsStageRegisters& cs_regs) { m_cs.cs_regs = cs_regs; }
void SetCsWaveSize(uint8_t wave_size) { m_cs.cs_regs.wave_size = wave_size; }
void SetPsUserSgpr(uint32_t id, uint32_t value, UserSgprType type) {
m_ps.ps_user_sgpr.value[id] = value;

12
src/graphics/guest_gpu/pm4.h
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@ -984,8 +984,16 @@ constexpr uint32_t COMPUTE_PGM_RSRC1_FP16_OVFL_SHIFT = 26;
constexpr uint32_t COMPUTE_PGM_RSRC1_FP16_OVFL_MASK = 0x1;
constexpr uint32_t COMPUTE_PGM_RSRC1_WGP_MODE_SHIFT = 29;
constexpr uint32_t COMPUTE_PGM_RSRC1_WGP_MODE_MASK = 0x1;
constexpr uint32_t COMPUTE_PGM_RSRC1_W32_EN_SHIFT = 30;
constexpr uint32_t COMPUTE_PGM_RSRC1_W32_EN_MASK = 0x1;
constexpr uint32_t COMPUTE_DISPATCH_INITIATOR_CS_W32_EN_SHIFT = 15;
constexpr uint32_t COMPUTE_DISPATCH_INITIATOR_CS_W32_EN_MASK = 0x1;
[[nodiscard]] constexpr uint8_t ComputeWaveSize(uint32_t dispatch_initiator) {
return ((dispatch_initiator >> COMPUTE_DISPATCH_INITIATOR_CS_W32_EN_SHIFT) &
COMPUTE_DISPATCH_INITIATOR_CS_W32_EN_MASK) != 0u
? 32u
: 64u;
}
constexpr uint32_t COMPUTE_PGM_RSRC2 = 0x213;
constexpr uint32_t COMPUTE_PGM_RSRC2_SCRATCH_EN_SHIFT = 0;

2
src/graphics/host_gpu/renderer/renderCompute.cpp
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@ -115,7 +115,7 @@ bool ResolveComputeImageClear(const ShaderComputeInputInfo& input, uint32_t grou
group_z == 1 && input.dispatch_threads_num[0] == group_x &&
input.dispatch_threads_num[1] == 1 && input.dispatch_threads_num[2] == 1 &&
input.group_id[0] && !input.group_id[1] && !input.group_id[2] &&
input.thread_ids_num == 1 && input.wave_size == 32 && !input.tg_size_en && mode == 0x61u &&
input.thread_ids_num == 1 && input.wave_size == 64 && !input.tg_size_en && mode == 0x61u &&
group_x % input.threads_num[0] == 0 && descriptor.NumRecords() == group_x;
const auto size = BufferDescriptorSize(descriptor);
if (!full_dispatch || size == 0) {

4
tests/ShaderRecompilerComputeTests.cpp
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@ -18780,14 +18780,14 @@ void CheckPs5GameExampleImageClearRuntimeShape() {
compute.dispatch_threads_num[2] = 1;
compute.group_id[0] = true;
compute.dispatch_thread_dimensions = true;
compute.wave_size = 32;
compute.wave_size = 64;
compute.thread_ids_num = 1;
compute.workgroup_register = 8;
const auto Compile = [&](const char *stage, const std::vector<u32> &code) {
ShaderRecompiler::CompileOptions options;
options.stage = ShaderType::Compute;
options.wave_size = 32;
options.wave_size = 64;
options.user_data_base = 0;
options.user_data_count = static_cast<u32>(user_data.size());
options.user_data = user_data.data();

24
tests/shaderCfgTests.cpp
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@ -8137,23 +8137,11 @@ void TestNewShaderRecompilerU64PairLowering() {
"dispatcher did not use one canonical U64 vector spill slot");
}
void TestComputeShaderInputWaveSize() {
const auto decode_wave_size = [](uint32_t rsrc1) {
const bool wave32 = (((rsrc1 >> Pm4::COMPUTE_PGM_RSRC1_W32_EN_SHIFT) &
Pm4::COMPUTE_PGM_RSRC1_W32_EN_MASK) != 0u);
return wave32 ? 32u : 64u;
};
constexpr uint32_t observed_wave32_rsrc1_a = 0x402c0146u;
constexpr uint32_t observed_wave32_rsrc1_b = 0x402c00c1u;
Check(decode_wave_size(observed_wave32_rsrc1_a) == 32u,
"COMPUTE_PGM_RSRC1 W32_EN bit did not match observed PS5 value A");
Check(decode_wave_size(observed_wave32_rsrc1_b) == 32u,
"COMPUTE_PGM_RSRC1 W32_EN bit did not match observed PS5 value B");
constexpr uint32_t w32_en_bit = 1u << Pm4::COMPUTE_PGM_RSRC1_W32_EN_SHIFT;
Check(decode_wave_size(observed_wave32_rsrc1_a & ~w32_en_bit) == 64u,
"cleared COMPUTE_PGM_RSRC1 W32_EN bit did not decode as wave64");
void TestComputeDispatchWaveSize() {
Check(Pm4::ComputeWaveSize(0x00000041u) == 64u,
"dispatch without CS_W32_EN did not select wave64");
Check(Pm4::ComputeWaveSize(0x00008041u) == 32u,
"dispatch with CS_W32_EN did not select wave32");
}
void TestNewShaderRecompilerBufferLoadsGuardedByExec() {
@ -11581,7 +11569,7 @@ int main() {
TestNewShaderRecompilerCfgIrreducibleDispatcher();
TestNewShaderRecompilerDispatcherSpillsU32x3();
TestNewShaderRecompilerU64PairLowering();
TestComputeShaderInputWaveSize();
TestComputeDispatchWaveSize();
TestNewShaderRecompilerBufferLoadsGuardedByExec();
TestNewShaderRecompilerBufferAtomicsGuardedByBounds();
TestNewShaderRecompilerPixelImageSampleLodSelection();