e591a66b67
Revert "shader: preserve raw VCC bits in S_MOV_B64 ( #418 )"
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This reverts commit 6758d67942
2026-09-01 07:50:37 +04:00
b8a459e83d
graphics: do not arm a fast clear from a read-modify-write dispatch ( #428 )
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* graphics: do not arm a fast clear from a read-modify-write dispatch
* tests: cover compute metadata clear classification
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Co-authored-by: nmzik <Nmzik@mail.ru>
2026-09-01 05:48:06 +04:00
7684c343d6
guest_gpu: fix private AGC register regression
2026-09-01 04:24:47 +04:00
1342c6f1e1
shader: took fixes from PR 427
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- apply c8f34f9's ResourceTracking portability fix
- complete V_CMP_LT_U64 and S_FLBIT_I32_B32 support
- add the sceAmprCommandBufferWaitOnAddress NID from f625a47
- add decoder and compute tests for both shader operations
Co-authored-by: Mac <me@itsmemac.com>
2026-08-31 23:49:21 +04:00
6453bafd1d
renderer: ignore inactive stencil registers for depth-only targets ( #425 )
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graphics: ignore inactive Hi-Stencil state
Co-authored-by: nmzik <Nmzik@mail.ru>
2026-08-31 22:39:44 +04:00
1df06e230d
guest_gpu: remove stale PS4/GCN era gpu registers
2026-08-31 20:58:35 +04:00
66ca225c76
shader: require explicit recompiler resource data
2026-08-31 10:26:08 +04:00
1592cf2b1b
shader: accept SDWA byte source for reverse shift
2026-08-31 09:53:26 +04:00
af8aecfdde
shader: remove recompiler error-string propagation
2026-08-31 05:31:41 +04:00
6758d67942
shader: preserve raw VCC bits in S_MOV_B64 ( #418 )
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* shader: preserve raw VCC bits in S_MOV_B64
* fix(shader): centralize scalar U64 mask provenance
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Co-authored-by: nmzik <Nmzik@mail.ru>
2026-08-31 03:04:16 +04:00
9992ab18fc
shader: preserve untouched half in VOP1 B16 writes ( #370 )
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shader: preserve native 16-bit destinations
Co-authored-by: nmzik <Nmzik@mail.ru>
2026-08-30 19:33:26 +04:00
18af08460f
shader: take the high half per lane in V_PK_FMAC_F16 ( #404 )
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Co-authored-by: nmzik <Nmzik@mail.ru>
2026-08-30 15:08:22 +04:00
39ee9972b8
shader: V_CMPX_CLASS_F32
2026-08-30 14:32:07 +04:00
ff61c1cecd
shader: implement V_SIN_F16 ( #399 )
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Co-authored-by: nmzik <Nmzik@mail.ru>
2026-08-30 01:32:49 +04:00
1a87cfedb5
shader: implement V_COS_F16
2026-08-29 19:23:19 +04:00
5bd447d2a2
shader: implement DS_BPERMUTE_B32
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Co-authored-by: Techx3 <56268269+Techx3@users.noreply.github.com>
2026-08-29 19:23:19 +04:00
ef639610e7
shader: allow SDWA add-with-carry
2026-08-29 15:31:20 +04:00
6c3b562822
graphics: support Standard64KB color target arrays ( #315 )
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graphics: support Standard64KB render target arrays
Co-authored-by: nmzik <Nmzik@mail.ru>
2026-08-29 15:18:44 +04:00
fcc9dff5b9
shader: DS_WRITE_B16_D16_HI
2026-08-29 14:40:13 +04:00
d9ae3ed64c
shader: V_FFBH_I32
2026-08-29 14:03:57 +04:00
dca7ece2ca
shader: legalize 1D level-zero gathers
2026-08-29 13:32:20 +04:00
53a59434d8
shader: implement V_CMP_EQ_U64
2026-08-29 11:26:05 +04:00
18b6c9059b
shader: support DS_READ_U16_D16_HI ( #356 )
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Decode the high-half D16 LDS read and route it through the existing unsigned-short load lowering. Represent the destination as a high-half partial write so the low 16 bits of the VGPR remain intact. Add captured-instruction decode coverage and a Vulkan execution regression that verifies the preserved half.
Co-authored-by: SueryRD <the.ai.tester2@gmail.com>
2026-08-29 10:39:45 +04:00
715539804b
shader: accept SDWA for VOP1 bit operations ( #360 )
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Allow byte, word, and full-dword SDWA source selection for V_NOT_B32 and V_FFBL_B32. Add captured instruction tests that verify decoding, IR extraction, SPIR-V generation, and runtime results.
Co-authored-by: SueryRD <the.ai.tester2@gmail.com>
2026-08-29 10:28:28 +04:00
cc5c0ec6b8
graphics: support PS5 1D color render targets
2026-08-27 14:47:17 +02:00
c167375fe1
shader: centralize program compilation and permutation caching
2026-08-27 13:37:46 +02:00
65871a53a6
graphics: collapse redundant Vulkan and command buffer types
2026-08-27 06:22:15 +02:00
1ff580498c
shader: support V_CMPX_NGT_F16 SDWA
2026-08-27 04:25:11 +02:00
ae896d0bf6
shader: support V_CMPX_GT_U16 SDWA
2026-08-27 04:13:12 +02:00
e738535294
graphics: add RDNA2 FLAT BDA buffer cache and faults
2026-08-27 03:45:41 +02:00
8072718462
graphics: replace command fences with timeline reuse
2026-08-26 10:03:43 +02:00
ffa69d48de
shader: remove second IR layer
2026-08-26 08:49:39 +02:00
fa891536df
graphics: do not copy PM4 streams & route executed packet interrupts properly
2026-08-25 23:22:54 +02:00
6eed46b024
renderer: simplify image view cache
2026-08-24 01:31:15 +02:00
e6ad87072d
renderer: avoid speculative buffer LRU touches
2026-08-24 01:12:41 +02:00
dd2fbd6c45
tests: cover large host buffer copies
2026-08-24 00:52:53 +02:00
1779142805
renderer: invalidate buffers on memory unmap
2026-08-24 00:40:02 +02:00
11d4c0d2a2
renderer: synchronize bounded buffer downloads
2026-08-23 19:22:17 +02:00
aa69b5b184
renderer: rewrite buffer lookup around page index
2026-08-23 19:22:17 +02:00
30fa9dddc5
renderer: respect buffer ownership in image downloads
2026-08-23 19:22:17 +02:00
bc9c70d50f
shader: implement RDNA2 V_LSHLREV_B64
2026-08-23 16:39:01 +02:00
bed19e5d8c
shader: preserve concurrent subword buffer stores
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Co-authored-by: Senaxx <Senaxx@users.noreply.github.com>
2026-08-23 03:53:47 +02:00
8d01fb1c18
shader: DS_READ_U16_D16, V_LSHRREV_B64,
2026-08-23 01:19:47 +02:00
a610528075
shader: V_CMPX_NE_I64
2026-08-23 00:59:44 +02:00
0d92ce49da
shader: support RDNA2 V_CMPX_NE_U64
2026-08-22 04:38:13 +02:00
9241fdc32a
shader: align float semantics with RDNA2 default mode
2026-08-22 03:16:45 +02:00
a2baaccc6e
shader: fix auxiliary position exports
2026-08-22 02:58:35 +02:00
c130d74efc
graphics: synthesize always-visible occlusion query results
2026-08-22 01:47:46 +02:00
bad6726f5e
Rewrite descriptor bindings and unify graphics push constants
2026-08-21 22:28:10 +02:00
26c4168160
refactor(renderer): simplify buffer and texture cache ownership
2026-08-21 20:11:38 +02:00
nmzik
Brandon Strong
GodsWill Dev
nomolao2-cell
Mehmet Cambaz