From 216f13af52050ff2c6e260df63b079bf39ae9bd6 Mon Sep 17 00:00:00 2001 From: ParantezTech <12572227+par274@users.noreply.github.com> Date: Thu, 1 Oct 2026 16:40:37 +0300 Subject: [PATCH] [SpirvTranslator] Synchronize shared memory phases in multi block shaders Co-authored-by: TarkusR <90155059+TarkusR@users.noreply.github.com> --- .../Gen5SpirvTranslator.cs | 3 +-- .../Gen5SharedMemoryBarrierTests.cs | 14 +++++++++----- 2 files changed, 10 insertions(+), 7 deletions(-) diff --git a/src/SharpEmu.ShaderCompiler.Vulkan/Gen5SpirvTranslator.cs b/src/SharpEmu.ShaderCompiler.Vulkan/Gen5SpirvTranslator.cs index cfc1e75..5f6201e 100644 --- a/src/SharpEmu.ShaderCompiler.Vulkan/Gen5SpirvTranslator.cs +++ b/src/SharpEmu.ShaderCompiler.Vulkan/Gen5SpirvTranslator.cs @@ -1361,8 +1361,7 @@ public static partial class Gen5SpirvTranslator error = string.Empty; var block = blocks[blockIndex]; // One guest wave can span two host subgroups. Keep its shared-memory phases ordered. - // Restrict added barriers to a single block, where all invocations follow the same path. - var synchronizeSharedMemory = _emulateWave64 && blocks.Count == 1; + var synchronizeSharedMemory = _emulateWave64; var sharedMemoryPhase = SharedMemoryPhase.None; for (var index = block.StartIndex; index < block.EndIndex; index++) { diff --git a/tests/SharpEmu.ShaderCompiler.Tests/Gen5SharedMemoryBarrierTests.cs b/tests/SharpEmu.ShaderCompiler.Tests/Gen5SharedMemoryBarrierTests.cs index ae087fd..ffb5eda 100644 --- a/tests/SharpEmu.ShaderCompiler.Tests/Gen5SharedMemoryBarrierTests.cs +++ b/tests/SharpEmu.ShaderCompiler.Tests/Gen5SharedMemoryBarrierTests.cs @@ -11,12 +11,14 @@ namespace SharpEmu.ShaderCompiler.Tests; public sealed class Gen5SharedMemoryBarrierTests { [Theory] - [InlineData(64u, 64u, false, 2)] - [InlineData(64u, 64u, true, 2)] - [InlineData(32u, 64u, false, 0)] - [InlineData(64u, 128u, false, 0)] + [InlineData(64u, 64u, false, false, 2)] + [InlineData(64u, 64u, true, false, 2)] + [InlineData(32u, 64u, false, false, 0)] + [InlineData(64u, 128u, false, false, 0)] + [InlineData(64u, 64u, false, true, 2)] + [InlineData(32u, 64u, false, true, 0)] public void SharedMemoryPhases_SynchronizeOnlySingleWaveGroups( - uint waveSize, uint threadCount, bool explicitBarrier, int expectedBarriers) + uint waveSize, uint threadCount, bool explicitBarrier, bool splitBlocks, int expectedBarriers) { var instructions = new List { @@ -25,6 +27,8 @@ public sealed class Gen5SharedMemoryBarrierTests }; if (explicitBarrier) instructions.Add(new(8, Gen5ShaderEncoding.Sopp, "SBarrier", [0u], [], [], null)); + if (splitBlocks) + instructions.Add(new(8, Gen5ShaderEncoding.Sopp, "SBranch", [0u], [], [], null)); instructions.Add(new(12, Gen5ShaderEncoding.Ds, "DsReadB32", [0u, 0u], [Gen5Operand.Vector(0)], [Gen5Operand.Vector(2)], new Gen5DataShareControl(0, 0, false))); instructions.Add(new(20, Gen5ShaderEncoding.Sopp, "SEndpgm", [0u], [], [], null));