[Kernel] Add _umtx_op wait and wake
Co-authored-by: Sekai <140012992+igettingit@users.noreply.github.com>
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@ -206,6 +206,80 @@ public static class KernelSyncOnAddressCompatExports
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LibraryName = "libKernel")]
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public static int SyncOnAddressWait64(CpuContext ctx) => Wait(ctx, is64Bit: true);
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[SysAbiExport(
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Nid = "04AjkP0jO9U",
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ExportName = "_umtx_op",
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Target = Generation.Gen4 | Generation.Gen5,
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LibraryName = "libKernel")]
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public static int UmtxOp(CpuContext ctx)
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{
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var address = ctx[CpuRegister.Rdi];
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var operation = unchecked((int)ctx[CpuRegister.Rsi]);
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var value = ctx[CpuRegister.Rdx];
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var secondaryAddress = ctx[CpuRegister.Rcx];
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var timeoutAddress = ctx[CpuRegister.R8];
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if (secondaryAddress != 0)
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{
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return SetPosixReturn(
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ctx,
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(int)OrbisGen2Result.ORBIS_GEN2_ERROR_INVALID_ARGUMENT);
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}
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switch (operation)
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{
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case UmtxOperationWait:
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{
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TimeSpan? timeout = null;
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long deadline = 0;
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if (timeoutAddress != 0)
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{
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if (!ctx.TryReadUInt64(timeoutAddress, out var secondsBits) ||
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!ctx.TryReadUInt64(timeoutAddress + sizeof(long), out var nanosecondsBits))
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{
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return SetPosixReturn(
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ctx,
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(int)OrbisGen2Result.ORBIS_GEN2_ERROR_MEMORY_FAULT);
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}
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var seconds = unchecked((long)secondsBits);
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var nanoseconds = unchecked((long)nanosecondsBits);
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if (seconds < 0 || nanoseconds < 0 || nanoseconds >= 1_000_000_000L)
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{
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return SetPosixReturn(
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ctx,
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(int)OrbisGen2Result.ORBIS_GEN2_ERROR_INVALID_ARGUMENT);
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}
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timeout = CreateTimespecDuration(seconds, nanoseconds);
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deadline = GuestThreadExecution.ComputeDeadlineTimestamp(timeout.Value);
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}
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return WaitCore(
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ctx,
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is64Bit: true,
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address,
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value,
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timeout,
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deadline,
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usePosixResult: true,
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reason: "_umtx_op.wait");
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}
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case UmtxOperationWake:
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return Wake(
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ctx,
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address,
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unchecked((int)value),
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usePosixResult: true);
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default:
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return SetPosixReturn(
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ctx,
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(int)OrbisGen2Result.ORBIS_GEN2_ERROR_INVALID_ARGUMENT);
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}
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}
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[SysAbiExport(
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Nid = "q2y-wDIVWZA",
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ExportName = "sceKernelSyncOnAddressWake",
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