125 lines
5.3 KiB
C#
125 lines
5.3 KiB
C#
// Copyright (C) 2026 SharpEmu Emulator Project
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// SPDX-License-Identifier: GPL-2.0-or-later
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using System.Buffers.Binary;
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using SharpEmu.HLE;
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using SharpEmu.Libs.Agc;
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using Xunit;
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namespace SharpEmu.Libs.Tests.Agc;
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public sealed class AgcPrimStateHullVariantTests
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{
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private const ulong BaseAddress = 0x1_0000_0000;
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private const ulong CxRegistersAddress = BaseAddress + 0x100;
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private const ulong UcRegistersAddress = BaseAddress + 0x200;
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private const ulong HullStateAddress = BaseAddress + 0x300;
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private const ulong GeometryShaderAddress = BaseAddress + 0x400;
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private const ulong SpecialsAddress = BaseAddress + 0x500;
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private const ulong HullSpecialsAddress = BaseAddress + 0x600;
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// Tessellation pipelines pass a non-null hull-state block; the
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// geometry-derived register writes must still happen instead of an
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// INVALID_ARGUMENT that leaves the caller's register storage as garbage.
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[Fact]
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public void CreatePrimState_AcceptsHullStateBlock()
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{
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var memory = new FakeCpuMemory(BaseAddress, 0x1000);
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var ctx = new CpuContext(memory, Generation.Gen5);
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memory.TryWrite(GeometryShaderAddress + 0x5A, new byte[] { 2 });
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WriteUInt64(memory, GeometryShaderAddress + 0x28, SpecialsAddress);
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memory.TryWrite(HullStateAddress + 0x5A, new byte[] { 3 });
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WriteUInt64(memory, HullStateAddress + 0x28, HullSpecialsAddress);
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// Specials: {register, value} pairs at GeCntl 0x00, StagesEn 0x08,
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// GsOutPrimType 0x20, GeUserVgprEn 0x28.
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WriteUInt64(memory, SpecialsAddress + 0x00, 0x0000_0111_0000_0222UL);
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WriteUInt64(memory, SpecialsAddress + 0x08, 0x0000_0333_0000_0444UL);
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WriteUInt64(memory, SpecialsAddress + 0x20, 0x0000_0555_0000_0666UL);
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WriteUInt64(memory, SpecialsAddress + 0x28, 0x0000_0777_0000_0888UL);
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WriteUInt64(memory, HullSpecialsAddress + 0x08, 0x0000_0000_0000_0444UL);
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WriteUInt64(memory, HullSpecialsAddress + 0x20, 0x0000_0999_0000_0666UL);
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WriteUInt64(memory, HullSpecialsAddress + 0x28, 0x0000_0AAA_0000_0888UL);
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ctx[CpuRegister.Rdi] = CxRegistersAddress;
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ctx[CpuRegister.Rsi] = UcRegistersAddress;
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ctx[CpuRegister.Rdx] = HullStateAddress;
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ctx[CpuRegister.Rcx] = GeometryShaderAddress;
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ctx[CpuRegister.R8] = 0x11;
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Assert.Equal(
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(int)OrbisGen2Result.ORBIS_GEN2_OK,
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AgcExports.CreatePrimState(ctx));
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Assert.NotEqual(0u, ReadUInt32(memory, CxRegistersAddress));
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Assert.Equal(0x11u, ReadUInt32(memory, UcRegistersAddress + 20));
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}
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[Fact]
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public void CreatePrimState_DerivesOutputPrimitiveWhenGeometryStageDoesNotOwnIt()
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{
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var memory = new FakeCpuMemory(BaseAddress, 0x1000);
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var ctx = new CpuContext(memory, Generation.Gen5);
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memory.TryWrite(GeometryShaderAddress + 0x5A, new byte[] { 2 });
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WriteUInt64(memory, GeometryShaderAddress + 0x28, SpecialsAddress);
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WriteUInt64(memory, SpecialsAddress + 0x00, 0x0000_0000_0000_0222UL);
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WriteUInt64(memory, SpecialsAddress + 0x08, 0x0000_0000_0000_0444UL);
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WriteUInt64(memory, SpecialsAddress + 0x20, 0x0000_0000_0000_029BUL);
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WriteUInt64(memory, SpecialsAddress + 0x28, 0x0000_0000_0000_0888UL);
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ctx[CpuRegister.Rdi] = CxRegistersAddress;
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ctx[CpuRegister.Rsi] = UcRegistersAddress;
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ctx[CpuRegister.Rcx] = GeometryShaderAddress;
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ctx[CpuRegister.R8] = 4;
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Assert.Equal(
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(int)OrbisGen2Result.ORBIS_GEN2_OK,
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AgcExports.CreatePrimState(ctx));
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Assert.Equal(0x29Bu, ReadUInt32(memory, CxRegistersAddress + 8));
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Assert.Equal(2u, ReadUInt32(memory, CxRegistersAddress + 12));
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}
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[Fact]
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public void CreatePrimState_PreservesShaderOutputPrimitiveWhenGeometryStageOwnsIt()
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{
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var memory = new FakeCpuMemory(BaseAddress, 0x1000);
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var ctx = new CpuContext(memory, Generation.Gen5);
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memory.TryWrite(GeometryShaderAddress + 0x5A, new byte[] { 2 });
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WriteUInt64(memory, GeometryShaderAddress + 0x28, SpecialsAddress);
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WriteUInt64(memory, SpecialsAddress + 0x00, 0x0000_0000_0000_0222UL);
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WriteUInt64(memory, SpecialsAddress + 0x08, 0x0000_0020_0000_0444UL);
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WriteUInt64(memory, SpecialsAddress + 0x20, 0x0000_0004_0000_029BUL);
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WriteUInt64(memory, SpecialsAddress + 0x28, 0x0000_0000_0000_0888UL);
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ctx[CpuRegister.Rdi] = CxRegistersAddress;
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ctx[CpuRegister.Rsi] = UcRegistersAddress;
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ctx[CpuRegister.Rcx] = GeometryShaderAddress;
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ctx[CpuRegister.R8] = 4;
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Assert.Equal(
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(int)OrbisGen2Result.ORBIS_GEN2_OK,
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AgcExports.CreatePrimState(ctx));
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Assert.Equal(0x29Bu, ReadUInt32(memory, CxRegistersAddress + 8));
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Assert.Equal(4u, ReadUInt32(memory, CxRegistersAddress + 12));
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}
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private static void WriteUInt64(FakeCpuMemory memory, ulong address, ulong value)
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{
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Span<byte> bytes = stackalloc byte[sizeof(ulong)];
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BinaryPrimitives.WriteUInt64LittleEndian(bytes, value);
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Assert.True(memory.TryWrite(address, bytes));
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}
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private static uint ReadUInt32(FakeCpuMemory memory, ulong address)
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{
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Span<byte> value = stackalloc byte[sizeof(uint)];
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Assert.True(memory.TryRead(address, value));
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return BinaryPrimitives.ReadUInt32LittleEndian(value);
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}
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}
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