290 lines
12 KiB
C#
290 lines
12 KiB
C#
// Copyright (C) 2026 SharpEmu Emulator Project
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// SPDX-License-Identifier: GPL-2.0-or-later
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using SharpEmu.HLE;
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using SharpEmu.ShaderCompiler;
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namespace SharpEmu.ShaderCompiler.Metal.Tests;
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internal sealed record Gen5ComputeFixture(
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string Name,
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uint[] Words,
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uint StoreScalarResourceBase,
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int StoreBackingBytes);
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/// <summary>
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/// Hand-assembled Gen5 (gfx10) programs plus the decode -> (state, evaluation) -> MSL
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/// pipeline the tests drive. Programs are synthetic by construction — shader binaries
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/// captured from games are copyrighted content and must never land in fixtures.
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/// </summary>
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internal static class Gen5ComputeFixtures
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{
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public const ulong ProgramAddress = 0x100000;
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// Straight-line ALU: VOP2 fmac + fmamk/fmaak literals + the VOP3 fmac form.
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public static readonly Gen5ComputeFixture Fmac = new(
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"fmac",
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[
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0x560A0501, // v_fmac_f32 v5, v1, v2
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0x580A0501, 0x42280000, // v_fmamk_f32 v5, v1, 42.0, v2
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0x5A0A0501, 0x42280000, // v_fmaak_f32 v5, v1, v2, 42.0
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0xD52B0005, 0x00020501, // v_fmac_f32_e64 v5, v1, v2
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0xBF810000, // s_endpgm
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],
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StoreScalarResourceBase: 0,
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StoreBackingBytes: 0);
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// VOP3 integer multiplies, low and high halves, signed and unsigned.
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public static readonly Gen5ComputeFixture Muls = new(
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"muls",
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[
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0xD5690005, 0x00020501, // v_mul_lo_u32 v5, v1, v2
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0xD56A0005, 0x00020501, // v_mul_hi_u32 v5, v1, v2
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0xD56B0005, 0x00020501, // v_mul_lo_i32 v5, v1, v2
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0xD56C0005, 0x00020501, // v_mul_hi_i32 v5, v1, v2
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0xBF810000, // s_endpgm
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],
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StoreScalarResourceBase: 0,
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StoreBackingBytes: 0);
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// End-to-end executable program: real ALU results stored to buffer 0 at dword
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// offsets 0/4/8, then proof that a store with EXEC=0 does not land (offset 12
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// keeps its sentinel) and that stores work again once EXEC is restored (16).
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public static readonly Gen5ComputeFixture ExecStore = new(
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"exec-store",
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[
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0xBFA10001, // s_clause 0x1 (scheduling hint)
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0x7E0002FF, 0x3FC00000, // v_mov_b32 v0, 1.5f
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0x7E0202FF, 0x40100000, // v_mov_b32 v1, 2.25f
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0x7E0402FF, 0x41200000, // v_mov_b32 v2, 10.0f
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0x56040300, // v_fmac_f32 v2, v0, v1 -> v2 = fma(1.5, 2.25, 10.0)
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0x7E0602FF, 0x7FFFFFFF, // v_mov_b32 v3, 0x7FFFFFFF
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0x7E0802FF, 0x00010003, // v_mov_b32 v4, 0x00010003
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0xD56C0005, 0x00020903, // v_mul_hi_i32 v5, v3, v4
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0xD56B0006, 0x00020903, // v_mul_lo_i32 v6, v3, v4
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0xE0700000, 0x80020200, // buffer_store_dword v2, off, s[8:11], 0
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0xE0700004, 0x80020500, // buffer_store_dword v5, off, s[8:11], 0 offset:4
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0xE0700008, 0x80020600, // buffer_store_dword v6, off, s[8:11], 0 offset:8
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0xBEFE0380, // s_mov_b32 exec_lo, 0 -> lane inactive
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0xE070000C, 0x80020200, // buffer_store_dword v2 offset:12 (masked, must not land)
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0xBEFE03C1, // s_mov_b32 exec_lo, -1 -> lane active again
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0xE0700010, 0x80020000, // buffer_store_dword v0 offset:16
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0xBF810000, // s_endpgm
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],
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StoreScalarResourceBase: 8,
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StoreBackingBytes: 64);
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// Control flow through the PC dispatcher: a scalar loop counting down from 5,
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// accumulating 5+4+3+2+1 = 15 into v1, with the result stored to buffer 0.
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// (s_sub_i32's SCC is signed overflow, so the loop condition needs an
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// explicit s_cmp_lg_u32 — which also exercises the scalar-compare path.)
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public static readonly Gen5ComputeFixture Loop = new(
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"loop",
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[
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0xBE800385, // s_mov_b32 s0, 5
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0x7E020280, // v_mov_b32 v1, 0
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// loop: (pc=0x8)
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0x4A020200, // v_add_nc_u32 v1, s0, v1
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0x81808100, // s_sub_i32 s0, s0, 1 (inline +1 = 0x81)
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0xBF078000, // s_cmp_lg_u32 s0, 0
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0xBF85FFFC, // s_cbranch_scc1 loop
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0xE0700000, 0x80020100, // buffer_store_dword v1, off, s[8:11], 0
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0xBF810000, // s_endpgm
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],
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StoreScalarResourceBase: 8,
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StoreBackingBytes: 16);
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// LDS round trip: write a literal through workgroup-shared memory, barrier,
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// read it back, and store it to buffer 0.
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public static readonly Gen5ComputeFixture Lds = new(
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"lds",
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[
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0x7E000280, // v_mov_b32 v0, 0 (LDS byte address)
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0x7E0402FF, 0x00001234, // v_mov_b32 v2, 0x1234
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0xD8340000, 0x00000200, // ds_write_b32 v0, v2
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0xBF8A0000, // s_barrier
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0xD8D80000, 0x03000000, // ds_read_b32 v3, v0
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0xE0700000, 0x80020300, // buffer_store_dword v3, off, s[8:11], 0
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0xBF810000, // s_endpgm
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],
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StoreScalarResourceBase: 8,
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StoreBackingBytes: 16);
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// Wave64 cross-lane: v_readfirstlane routes through the translator's
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// two-half threadgroup-scratch broadcast bridge. All lanes hold the same
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// value (42), so the broadcast result is 42 on every lane regardless of
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// which lane is "first" — the fixture's job is to prove the emitted wave64
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// MSL compiles and that a full 64-lane dispatch runs through the bridge
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// barriers without deadlocking, returning the broadcast value.
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public static readonly Gen5ComputeFixture Wave64Broadcast = new(
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"wave64-broadcast",
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[
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0x7E0002FF, 0x0000002A, // v_mov_b32 v0, 42
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0x7E000500, // v_readfirstlane_b32 s0, v0
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0x7E020200, // v_mov_b32 v1, s0
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0xE0700000, 0x80020100, // buffer_store_dword v1, off, s[8:11], 0
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0xBF810000, // s_endpgm
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],
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StoreScalarResourceBase: 8,
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StoreBackingBytes: 16);
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public static readonly Gen5ComputeFixture[] All = [Fmac, Muls, ExecStore, Loop, Lds];
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// Minimal pixel program: two interpolated attribute channels plus two
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// inline constants exported to MRT0 (done+vm).
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public static readonly uint[] PixelWords =
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[
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0xC8020002, // v_interp_mov_f32 v0, p0, attr0.x
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0xC8060102, // v_interp_mov_f32 v1, p0, attr0.y
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0x7E0402F2, // v_mov_b32 v2, 1.0
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0x7E0602F0, // v_mov_b32 v3, 0.5
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0xF800180F, 0x03020100, // exp mrt0 v0, v1, v2, v3 done vm
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0xBF810000, // s_endpgm
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];
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// Minimal vertex program: constant position export plus one param output.
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public static readonly uint[] VertexWords =
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[
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0x7E000280, // v_mov_b32 v0, 0
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0x7E0202F2, // v_mov_b32 v1, 1.0
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0xF80008CF, 0x01000000, // exp pos0 v0, v0, v0, v1 done
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0xF800020F, 0x01000101, // exp param0 v1, v1, v0, v1
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0xBF810000, // s_endpgm
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];
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public static Gen5MslShader CompileVertexOrThrow(int requiredVertexOutputCount = 0)
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{
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var memory = new FakeGuestMemory();
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memory.AddRegion(ProgramAddress, VertexWords);
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var ctx = new CpuContext(memory, Generation.Gen5);
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if (!Gen5ShaderTranslator.TryDecodeProgram(ctx, ProgramAddress, out var program, out var decodeError))
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{
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throw new InvalidOperationException($"[vertex] decode failed: {decodeError}");
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}
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var state = new Gen5ShaderState(program!, new uint[16], Metadata: null);
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var evaluation = new Gen5ShaderEvaluation(
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new uint[128],
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new uint[128],
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Array.Empty<Gen5ImageBinding>(),
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Array.Empty<Gen5GlobalMemoryBinding>());
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if (!Gen5MslTranslator.TryCompileVertexShader(
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state,
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evaluation,
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out var shader,
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out var compileError,
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requiredVertexOutputCount: requiredVertexOutputCount))
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{
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throw new InvalidOperationException($"[vertex] MSL emit failed: {compileError}");
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}
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return shader;
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}
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public static Gen5MslShader CompilePixelOrThrow(
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Gen5PixelOutputKind outputKind = Gen5PixelOutputKind.Float)
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{
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var memory = new FakeGuestMemory();
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memory.AddRegion(ProgramAddress, PixelWords);
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var ctx = new CpuContext(memory, Generation.Gen5);
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if (!Gen5ShaderTranslator.TryDecodeProgram(ctx, ProgramAddress, out var program, out var decodeError))
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{
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throw new InvalidOperationException($"[pixel] decode failed: {decodeError}");
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}
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var state = new Gen5ShaderState(program!, new uint[16], Metadata: null);
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var evaluation = new Gen5ShaderEvaluation(
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new uint[128],
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new uint[128],
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Array.Empty<Gen5ImageBinding>(),
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Array.Empty<Gen5GlobalMemoryBinding>());
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if (!Gen5MslTranslator.TryCompilePixelShader(
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state,
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evaluation,
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outputKind,
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out var shader,
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out var compileError))
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{
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throw new InvalidOperationException($"[pixel] MSL emit failed: {compileError}");
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}
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return shader;
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}
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/// <summary>Drives the real decoder and the MSL emitter for one fixture.</summary>
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public static Gen5MslShader CompileOrThrow(Gen5ComputeFixture fixture) =>
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CompileOrThrow(fixture, waveLaneCount: 32, localSizeX: 32);
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public static Gen5MslShader CompileOrThrow(
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Gen5ComputeFixture fixture,
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uint waveLaneCount,
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uint localSizeX)
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{
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var program = DecodeOrThrow(fixture);
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// Buffer stores need a global-memory binding; the emitter resolves them
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// by instruction PC, so collect memory-access PCs from the decoded
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// program itself.
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var accessPcs = new List<uint>();
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foreach (var instruction in program.Instructions)
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{
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if (instruction.Control is Gen5BufferMemoryControl or Gen5GlobalMemoryControl)
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{
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accessPcs.Add(instruction.Pc);
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}
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}
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var globalBindings = accessPcs.Count != 0
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? new[]
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{
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new Gen5GlobalMemoryBinding(
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fixture.StoreScalarResourceBase,
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0UL,
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accessPcs,
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new byte[Math.Max(fixture.StoreBackingBytes, 4)],
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Math.Max(fixture.StoreBackingBytes, 4),
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DataPooled: false)
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{
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Writable = true,
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},
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}
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: Array.Empty<Gen5GlobalMemoryBinding>();
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var state = new Gen5ShaderState(program, new uint[16], Metadata: null);
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var evaluation = new Gen5ShaderEvaluation(
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new uint[128],
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new uint[128],
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Array.Empty<Gen5ImageBinding>(),
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globalBindings);
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if (!Gen5MslTranslator.TryCompileComputeShader(
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state,
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evaluation,
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localSizeX,
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1,
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1,
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out var shader,
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out var compileError,
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waveLaneCount: waveLaneCount))
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{
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throw new InvalidOperationException($"[{fixture.Name}] MSL emit failed: {compileError}");
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}
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return shader;
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}
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public static Gen5ShaderProgram DecodeOrThrow(Gen5ComputeFixture fixture)
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{
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var memory = new FakeGuestMemory();
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memory.AddRegion(ProgramAddress, fixture.Words);
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var ctx = new CpuContext(memory, Generation.Gen5);
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if (!Gen5ShaderTranslator.TryDecodeProgram(ctx, ProgramAddress, out var program, out var decodeError))
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{
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throw new InvalidOperationException($"[{fixture.Name}] decode failed: {decodeError}");
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}
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return program!;
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}
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}
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