Commit Graph

379 Commits

Author SHA1 Message Date
boykopovar fa2df2e2ff fix(tests): correct buffer descriptors in memory and wave execution tests 2026-10-08 17:37:32 +03:00
boykopovar 49f36309bf fix(tests): correct buffer OOB modes in half, FMA and packed arithmetic tests 2026-10-08 17:37:31 +03:00
boykopovar 9e7aad07c8 fix(tests): correct buffer OOB modes in F32, F64 and division tests 2026-10-08 17:37:30 +03:00
boykopovar 972122bcef fix(tests): correct buffer OOB modes in VOP and SDWA tests 2026-10-08 17:37:29 +03:00
boykopovar d2c6546124 fix(tests): correct buffer OOB modes in DPP, DS, LDS and scalar tests 2026-10-08 17:37:28 +03:00
boykopovar 7fc7372274 perf(shader): cache registered state + reduce preparation transaction overhead 2026-10-08 17:37:03 +03:00
boykopovar 05fa426112 perf(shader): eliminate prepared-path overhead in data, descriptors, dispatch, bda 2026-10-08 17:29:17 +03:00
boykopovar d21c4b737b fix(shader): publish prepared stage groups atomically + preserve snapshot lifetime 2026-10-08 17:28:31 +03:00
boykopovar 2a117a6e5a fix(shader): apply fragment export mappings at runtime 2026-10-08 17:28:29 +03:00
boykopovar 9a1783c043 fix(shader): prepare rectangle artifacts across separate helper calls 2026-10-08 17:27:59 +03:00
boykopovar cb57d2502a fix(shader): align prepared graphics with draw stage decoding 2026-10-08 17:27:58 +03:00
boykopovar 3e47c30ed7 fix(shader): handle repeated registers and prepare msaa storage shaders 2026-10-08 17:27:28 +03:00
boykopovar dc62c432b4 perf(shader): eliminate redundant prepared invocation work 2026-10-08 17:27:26 +03:00
boykopovar ed3055a914 fix(shader): restore prepared shader execution tests 2026-10-08 17:26:57 +03:00
boykopovar f524bbedc3 refactor(shader): separate artifact preparation from draw and dispatch 2026-10-08 17:26:40 +03:00
boykopovar ab0f9985fa feat(shader): resolve bindless resources through runtime heap metadata 2026-10-08 17:26:36 +03:00
boykopovar 1174069239 feat(shader): select image and sampler resources at runtime 2026-10-08 17:26:34 +03:00
boykopovar dccfa08de9 feat(shader): add fixed runtime abi + typed descriptor heaps 2026-10-08 17:26:04 +03:00
boykopovar 27439c43cc feat(shader): version runtime abi + freeze device capabilities 2026-10-08 17:26:01 +03:00
boykopovar ae9a36e075 feat(shader): execute vertex fetch through runtime buffer descriptors 2026-10-08 17:25:35 +03:00
boykopovar 91a33705b6 fix(shader): avoid copying spirv in artifact reuse test 2026-10-08 17:25:15 +03:00
boykopovar b08c410b97 feat(shader): move buffer accesses to runtime descriptors via bda 2026-10-08 17:25:14 +03:00
Adrià 02e741060e
Merge pull request #1394 from gjonn/feat/agc-r10g11b11-float-images
feat(agc): load and store R10_G11_B11 float images
2026-10-08 15:25:08 +02:00
Adrià 588c7b7b5e
Merge pull request #1402 from gjonn/claude/sleepy-engelbart-7b6379
fix(recompiler): take point-filtered sampler copies' descriptors from their source sampler
2026-10-08 15:17:38 +02:00
Scott Schuster 71e566fafb fix(recompiler): give vertex-path shaders a full NGG merged wave info
The vertex entry set only the vertex and instance index VGPRs, leaving
the NGG merged wave info SGPR s3 at 0. NGG shaders build EXEC from it
(s_bfe_u64 exec, -1, <count in bits 16..22>), so Mesa's NGG vertex
shaders ran with an empty EXEC and rasterized nothing.

Each host invocation on the vertex path is one vertex of a full wave:
when the user data starts at s8 or later, set s3 to the wave size as
both vertex and primitive count, with wave index 0.

Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>
2026-10-08 15:05:35 +02:00
Adrià Franch 61fbade375 test(agc): pin R10_G11_B11 float image edge values
Store: negative, -0, NaN (quiet and low-payload), +-Inf, overflow to the
largest finite value, truncation and small-float denormals. Load: Inf,
denormal and largest finite codes. Values measured on gfx1035.

Co-Authored-By: Claude <noreply@anthropic.com>
2026-10-08 15:04:47 +02:00
Gjon Gojcevic ede33d56e2 feat(agc): load and store R10_G11_B11 float images
Format 43 packs R as a 10-bit and G and B as 11-bit unsigned floats, which
Vulkan has no format for. Keep it in an R32_UINT image like the other
packed formats without a host equivalent, and convert texels in the shader
on image loads and stores; sampling it still throws.
2026-10-08 15:04:47 +02:00
Gjon Gojcevic 71851d66a3 fix(recompiler): take point-filtered sampler copies' descriptors from their source sampler
When one guest sampler is paired both with an image that needs point
filtering (sint, depth-bits or converted format) and with an ordinary
image, ResourceMaterializer::Apply appends a point-filtered copy of the
sampler after the original samplers. The resource snapshot only holds
the original samplers, so DescriptorBindingBuilder::Populate threw
"guest sampler index is out of range" for the copy, both in the sampler
binding and in the unnormalized-coordinate check.

SamplerResource::copyOf records the sampler a copy was made from, and
the guest sampler descriptor of a copy is read from that sampler; the
point-filter rewrite of word 2 still applies to the copy. The field is
part of the disk cache encoding: cache format version 8.

Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>
2026-10-08 14:55:18 +02:00
Adrià e08c816abc
Merge pull request #1383 from nisbenz/fix/shader-memtime-narrow-subgroup-clock
fix(shader): read s_memtime from the device clock where RADV's subgroup clock is 20 bits
2026-10-08 14:51:41 +02:00
Adrià 0596a7a274
Merge pull request #1385 from gjonn/feat/recompiler-lwe-on-samples
feat(recompiler): accept lwe on MIMG samples and gathers
2026-10-08 14:43:27 +02:00
nisbenz f025a9e506 fix(shader): read s_memtime from the device clock where RADV's subgroup clock is 20 bits
On GFX10.3 to GFX11.7, ACO lowers a subgroup-scope OpReadClockKHR to
s_getreg_b32 of SHADER_CYCLES, 20 bits zero-extended to 64, so s_memtime
wrapped every 2^20 cycles and went backwards. Detect those families from
the RADV device name and read the device clock there instead.

Fixes #985

Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>
2026-10-08 14:42:40 +02:00
Adrià 3c4bdda47a
Merge pull request #1379 from gjonn/fix/recompiler-image-load-missing-coordinates
fix(recompiler): read image address components the instruction omits as 0
2026-10-08 14:42:10 +02:00
Adrià 072804fd33
Merge pull request #1288 from Celegans12/fix/agc-dcc-filled-keys-refresh
fix(agc): forget a DCC key fill once a refresh sees other keys
2026-10-08 14:35:47 +02:00
Adrià cba8d86da8
Merge pull request #1270 from Celegans12/fix/agc-unaligned-buffer-views
fix(agc): bind guest buffer views that start off a DWORD boundary
2026-10-08 14:34:45 +02:00
Adrià 0b3cc73e1c
Merge pull request #1112 from Celegans12/feat/agc-conservative-rasterization
feat(agc): implement overestimating conservative rasterization
2026-10-08 14:31:38 +02:00
Celegans12 29c22442dc feat(agc): implement overestimating conservative rasterization
A draw whose PA_SC_CONSERVATIVE_RASTERIZATION_CNTL (context 0x313) was
not the default 0x6000 threw in DecodeState and the draw precheck.
0x6001 sets OVER_RAST_ENABLE and now decodes to Vulkan's overestimation
mode, chained to the pipeline's rasterization state and its key.

The device enables VK_EXT_conservative_rasterization only when its
primitiveOverestimationSize is at most 1/256 pixel and it rasterizes
degenerate triangles; elsewhere the pipeline throws. Overestimation is
accepted only when triangles reach the rasterizer: VGT_GS_OUT_PRIM_TYPE
behind a geometry shader, VGT_TF_PARAM's output topology behind
tessellation, VGT_PRIMITIVE_TYPE otherwise. Other 0x313 values and
centroid interpolation still throw.

Adds the agc_driver_conservative_rasterization GPU test and extends
agc_driver_graphics.
2026-10-08 13:20:22 +02:00
Nikhil Panchal 43074a805e fix(recompiler): avoid illegal narrow constants during optimization
Skip CCP and Simplification for storage-only narrow types while keeping
the remaining passes and arithmetic-capable folding.

Add compiler and Vulkan readback regressions for default/full/none modes.

Tested: Linux/llvmpipe, full CTest with SPIRV-Tools on/off, ASan/UBSan
optimizer checks, and cold-cache Vulkan wave32/wave64 readback.

Fixes boykopovar/AnyPS5#1276
2026-10-08 13:20:06 +02:00
Celegans12 38e89df1a5 fix(agc): bind guest buffer views that start off a DWORD boundary
A V# whose base is not a multiple of 4 bytes from the start of its GPU
owner threw in GuestBufferMemory::Descriptor, because the shader added
the offset below the view only in whole dwords.

Descriptor now binds from the offset alignment below the view and
passes the whole remainder. Such a view's range covers the dwords
around it, and its descriptor region starts and ends on dword
boundaries, so a lone view copied to its own buffer binds the same way.

The buffer specialization records the V# base's low two bits. Raw
vector loads through such a V# join two dwords, glc dwordx2 loads
included, stores merge their bytes into both with compare-exchange
loops, and bounds checks include the second dword. s_buffer_load
ignores the low two bits, as SrtEvaluator does. Formatted accesses
whose element alignment (min(element bytes, 4)) the base breaks throw,
as they fault the wave on RDNA2, and so do atomics.
2026-10-08 13:01:27 +02:00
Adrià b599fe0586
Merge pull request #1268 from Celegans12/fix/shader-wave64-half-wave-reductions
fix(shader): read the half-wave scans of wave64 reductions on any host subgroup
2026-10-08 12:58:18 +02:00
Celegans12 ccddd4f89b fix(agc): forget a DCC key fill once a refresh sees other keys
StorageTexture::MarkDirty skips the first write's uncompressed key
store while the image's filledKeys holds a clear code, and only an
upload or clearByKeysFill reset that fill. After a 0001 key fill, a
kernel storing 0000 over the keys and a storage write, the refresh of
write-watched memory read 0000, the keys the image was uploaded under,
so it did not upload again and kept the stale 0001. The write then
left the 0000 keys in memory, and a kernel reading them saw the clear
colour.

StorageTexture::ProvedKeys, the key read of Refresh and the fast
revalidation, now forgets the fill when it reads other keys while the
image has no results pending. An image with pending results keeps it,
since its write-backs treat those results as killed by that fill.
2026-10-08 12:55:45 +02:00
Adrià e28fa01ca6
Merge pull request #1253 from popcoder565/feat/shader-system-opcodes
feat(shader): decode halt, trap return, code end, GWS and ordered count instructions
2026-10-08 12:19:38 +02:00
Adrià Franch ce5be8c2b4 test(agc): pin the AND and OR half-wave reductions in the pixel execution test
Co-Authored-By: Claude <noreply@anthropic.com>
2026-10-08 12:16:02 +02:00
Celegans12 9513703244 fix(shader): read the half-wave scans of wave64 reductions on any host subgroup
The GFX10 lowering of a wave64 reduction scans rows with DPP row_shr
1/2/4/8 and v_permlanex16_b32 under EXEC -1, then joins lanes 31 and 63
with a scalar op. The console fills lanes outside the entry EXEC with
the identity, but on the host they can be helpers that sit out subgroup
operations or invocations that were never launched: on 64 lanes (RADV)
the emulated chain reads 0 or stale values from them, and on 32 lanes
lane 63 throws since #997.

EmitReadLane now recognises the sequence on any host for UMin, UMax,
SMin, SMax, IAdd, AND and OR when the keys are the identity outside the
entry EXEC. On 64 lanes, lanes 31 and 63 become subgroup reductions of
the keys of invocations 0-31 and 32-63; on 32 lanes or fewer, lane 31
reduces all keys and lane 63 is the identity. It throws without
subgroup arithmetic or on a subgroup wider than the wave. VulkanDevice
reports GroupNonUniformArithmetic and ShaderValidation checks it.
2026-10-08 12:10:32 +02:00
Adrià 30e89cc6a0
Merge pull request #1266 from Celegans12/fix/agc-oversized-descriptor-sets
fix(agc): allocate oversized descriptor sets from a dedicated pool
2026-10-08 12:09:59 +02:00
Adrià 915e3b753f
Merge pull request #1264 from Celegans12/fix/shader-wave64-exec-host-lanes
fix(shader): mask EXEC copies to the host subgroup's lanes
2026-10-08 12:08:54 +02:00
Adrià 3069680b70
Merge pull request #1130 from Celegans12/feat/agc-ordered-pixel-shader
feat(agc): implement primitive-ordered pixel shaders with fragment shader interlock
2026-10-08 12:01:03 +02:00
popcoder565 a5717b6613 feat(shader): decode halt, trap return, code end, GWS and ordered count instructions
s_sethalt with SIMM16[0] clear is a no-op; s_sethalt 1, s_sendmsghalt, a reached s_code_end, s_rfe_b64, the ds_gws_* instructions and ds_ordered_count throw with the reason at translation. Linear decoding stops at s_code_end like at s_endpgm, so code padded with s_code_end after a final backward branch decodes. Encodings from LLVM SOPInstructions.td and DSInstructions.td, checked against the gfx10 MC tests; semantics from the RDNA 2 ISA guide.
2026-10-08 11:49:06 +02:00
Adrià b680d5adac
Merge pull request #1198 from Sanjaysrinivas/feat/shader-conditional-exchange
feat(shader): add LDS conditional exchange
2026-10-08 11:34:31 +02:00
Adrià 96614df544
Merge pull request #1239 from awake-devel/fix/agc-release-host-imports
fix(agc): release host imports before the device is destroyed
2026-10-08 11:27:40 +02:00
Celegans12 e1d4e699be feat(agc): implement primitive-ordered pixel shaders with fragment shader interlock
DecodeState and the draw precheck rejected DB_SHADER_CONTROL bit 16,
PRIMITIVE_ORDERED_PIXEL_SHADER (POPS), which runs the ordered section
of overlapping pixels' shaders in primitive order. The bit now reaches
the recompiler as a pixel stage field, and such a pixel shader declares
PixelInterlockOrderedEXT and runs its whole body between
OpBeginInvocationInterlockEXT and OpEndInvocationInterlockEXT; an
invocation that a BDA read fault kills ends the interlock first. The
POPS collision SGPRs read 0, so a title skips its POPS wait and runs
its per-collision loop once. An image_load still reads a sampled
binding, which misses an earlier overlapping primitive's image_store in
the same draw. The device enables VK_EXT_fragment_shader_interlock when
it has fragmentShaderPixelInterlock; without it the recompile throws,
as does a nonzero POPS_OVERLAP_NUM_SAMPLES. The field is part of the
recompile cache key, the draw key and the serialized request (version 10).
2026-10-08 11:18:46 +02:00