f8ed012e3e
`v_movrels_b32`, `v_movreld_b32`, `v_movrelsd_b32`, `v_movrelsd_2_b32` and `v_swaprel_b32` lowered to a compare-and-select chain over every register from the base to the program's last allocated register, so a program addressing 154 registers 104 times turned 3176 ISA words into 649,515 SPIR-V words that Intel's compiler did not finish. The registers from the lowest relative base up now live in a function-scope array per invocation (`LoadVectorWindow`/`StoreVectorWindow`), so an indexed access is one load or store; plain accesses to those registers go through the same array, DPP-modified relative writes keep their `DppUpdateU32` merge, an index past the window reads 0 and drops its write, and programs without relative addressing are unchanged. The same program recompiles to 392,333 words with 4,992 selects instead of 32,383. Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com> |
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