shader: FLAT opcode=0x24
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nmzik
parent
af3011cd69
commit
2b1b7ed0e4
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@ -84,6 +84,7 @@ constexpr MemoryOpcodeInfo FLAT_OPCODE_LIST[] = {
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{0x18u, Opcode::FLAT_STORE_BYTE, 1, 8}, {0x1au, Opcode::FLAT_STORE_SHORT, 1, 16},
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{0x1cu, Opcode::FLAT_STORE_DWORD, 1, 32}, {0x1du, Opcode::FLAT_STORE_DWORDX2, 2, 32},
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{0x1eu, Opcode::FLAT_STORE_DWORDX4, 4, 32}, {0x1fu, Opcode::FLAT_STORE_DWORDX3, 3, 32},
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{0x24u, Opcode::FLAT_LOAD_SHORT_D16, 1, 16},
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};
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constexpr MemoryOpcodeInfo DS_OPCODE_LIST[] = {
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@ -373,6 +374,10 @@ void DecodeFlat(uint32_t pc, std::span<const uint32_t> code, uint32_t word_index
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}
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DecodeVectorGpr(IsFlatStoreOpcode(inst.opcode) ? data : vdst, inst.dst);
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if (inst.opcode == Opcode::FLAT_LOAD_SHORT_D16) {
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// D16 loads reuse partial destinations to preserve the untouched high half.
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inst.dst.sdwa_sel = 4u;
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}
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DecodeVectorGpr(addr, inst.src0);
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inst.src_count = 1;
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if (seg == 0u || saddr == 0x7du || saddr == 0x7fu) {
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@ -663,6 +663,7 @@ std::string InstructionToString(const Instruction& inst) {
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case Opcode::FLAT_LOAD_SBYTE:
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case Opcode::FLAT_LOAD_USHORT:
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case Opcode::FLAT_LOAD_SSHORT:
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case Opcode::FLAT_LOAD_SHORT_D16:
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case Opcode::FLAT_LOAD_DWORD:
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case Opcode::FLAT_LOAD_DWORDX2:
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case Opcode::FLAT_LOAD_DWORDX3:
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@ -532,6 +532,7 @@ enum class Opcode {
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FLAT_LOAD_SBYTE,
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FLAT_LOAD_USHORT,
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FLAT_LOAD_SSHORT,
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FLAT_LOAD_SHORT_D16,
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FLAT_LOAD_DWORD,
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FLAT_LOAD_DWORDX2,
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FLAT_LOAD_DWORDX3,
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@ -1077,6 +1077,7 @@ void Translator::EmitMemory(const Decoder::Instruction& inst) {
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case Decoder::Opcode::FLAT_LOAD_SBYTE:
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case Decoder::Opcode::FLAT_LOAD_USHORT:
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case Decoder::Opcode::FLAT_LOAD_SSHORT:
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case Decoder::Opcode::FLAT_LOAD_SHORT_D16:
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case Decoder::Opcode::FLAT_LOAD_DWORD:
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case Decoder::Opcode::FLAT_LOAD_DWORDX2:
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case Decoder::Opcode::FLAT_LOAD_DWORDX3:
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@ -18672,6 +18672,7 @@ CoverageClass ClassifyOpcode(ShaderOpcode opcode,
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case Opcode::FLAT_LOAD_SBYTE:
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case Opcode::FLAT_LOAD_USHORT:
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case Opcode::FLAT_LOAD_SSHORT:
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case Opcode::FLAT_LOAD_SHORT_D16:
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case Opcode::FLAT_LOAD_DWORD:
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case Opcode::FLAT_LOAD_DWORDX2:
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case Opcode::FLAT_LOAD_DWORDX3:
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@ -29171,6 +29172,89 @@ TestCase FlatSubdwordLoadsApplyByteOffset() {
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return test;
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}
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TestCase GlobalLoadShortD16Captured(u32 wave_size) {
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using O = ShaderOpcode;
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constexpr uint64_t GuestBase = 0x0000000110000000ull;
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constexpr u32 Marker = 0xa5a50000u;
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constexpr uint64_t ScalarBase = GuestBase - Marker - 0x70u;
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constexpr uint64_t ExecMask = 0xaaaaaaaa55555555ull;
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constexpr u32 Values[] = {0u, 0x7fffu, 0x8000u, 0xffffu};
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TestCase test;
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test.name = wave_size == 32u ? "GlobalLoadShortD16CapturedWave32"
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: "GlobalLoadShortD16CapturedWave64";
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test.initial.resize(2u * wave_size + wave_size / 2u);
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test.expected.resize(2u * wave_size);
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for (u32 lane = 0; lane < wave_size; ++lane) {
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const u32 value = Values[lane % std::size(Values)];
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test.initial[2u * wave_size + lane / 2u] |= value << (16u * (lane % 2u));
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test.expected[lane] = Marker | value;
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test.expected[wave_size + lane] = Marker |
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((ExecMask & (uint64_t{1} << lane)) != 0u ? value : lane * 2u);
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}
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auto &code = test.code;
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AppendSMovLiteral(&code, 2, static_cast<u32>(ScalarBase));
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AppendSMovLiteral(&code, 3, static_cast<u32>(ScalarBase >> 32u));
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code.push_back(EncodeVop2(0x1a, 6, InlineU32(1), 0));
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AppendVMovLiteral(&code, 5, Marker);
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code.push_back(EncodeVop2(0x25, 6, Vgpr(5), 6));
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for (bool masked : {false, true}) {
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code.push_back(EncodeVop1(0x01, 5, Vgpr(6)));
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if (masked) {
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code.push_back(EncodeSop1(0x04, 8, 126));
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AppendSMovLiteral(&code, 126, static_cast<u32>(ExecMask));
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AppendSMovLiteral(&code, 127, static_cast<u32>(ExecMask >> 32u));
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}
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// Captured GLOBAL_LOAD_SHORT_D16: v5 supplies the byte offset and destination.
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code.insert(code.end(), {0xdc908070u, 0x05020005u});
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if (masked) code.push_back(EncodeSop1(0x04, 126, 8));
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AppendStoreVgprAtLaneDwordOffset(&code, 5, 0, masked ? wave_size : 0u);
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}
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AppendEnd(&code);
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test.bda_mappings = {{GuestBase, 8u * wave_size}};
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test.compute_info.threads_num[0] = wave_size;
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test.compute_info.threads_num[1] = 1;
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test.compute_info.threads_num[2] = 1;
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test.compute_info.thread_ids_num = 1;
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test.compute_info.wave_size = wave_size;
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test.has_compute_info = true;
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test.opcodes = {O::S_MOV_B32, O::S_MOV_B64, O::V_MOV_B32, O::V_LSHLREV_B32,
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O::V_ADD_NC_U32, O::FLAT_LOAD_SHORT_D16,
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O::BUFFER_STORE_DWORD, O::S_ENDPGM};
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test.decoded_counts = {{"FLAT_LOAD_SHORT_D16", 2}};
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return test;
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}
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TestCase FlatLoadShortD16AddressSegments() {
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using O = ShaderOpcode;
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constexpr uint64_t GuestBase = 0x0000000110000000ull;
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std::vector<u32> code;
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AppendVMovLiteral(&code, 20, static_cast<u32>(GuestBase) + 2u);
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AppendVMovLiteral(&code, 21, static_cast<u32>(GuestBase >> 32u));
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for (u32 segment : {0u, 2u}) {
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AppendVMovLiteral(&code, 3, 0x12345678u);
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code.push_back(EncodeFlat0(0x24, segment, segment == 0u ? 0u : 0xffeu));
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code.push_back(EncodeFlat1(3, 0x7d, 0, 20));
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AppendStoreVgpr(&code, 3, segment == 0u ? 0u : 1u);
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}
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AppendVMovU32(&code, 20, 0u);
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AppendVMovLiteral(&code, 3, 0xbeef5678u);
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code.push_back(EncodeFlat0(0x1c, 1, 0));
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code.push_back(EncodeFlat1(0, 0x7d, 3, 20));
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AppendVMovLiteral(&code, 3, 0x98761234u);
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code.push_back(EncodeFlat0(0x24, 1, 2));
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code.push_back(EncodeFlat1(3, 0x7d, 0, 20));
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AppendStoreVgpr(&code, 3, 2);
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AppendEnd(&code);
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TestCase test{"FlatLoadShortD16AddressSegments", code,
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{0, 0, 0, 0, 0x80017fffu},
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{0x12348001u, 0x12347fffu, 0x9876beefu},
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{O::V_MOV_B32, O::FLAT_LOAD_SHORT_D16, O::FLAT_STORE_DWORD,
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O::BUFFER_STORE_DWORD, O::S_ENDPGM}};
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test.bda_mappings = {{GuestBase, 16}};
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test.compute_info.scratch_size_dwords = 1;
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return test;
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}
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TestCase BranchVccnzUsesCarryProducedWaveMask() {
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using O = ShaderOpcode;
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@ -34720,6 +34804,9 @@ std::vector<TestCase> MakeCases() {
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AddCase(TBufferStoreVariants);
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AddCase(FlatLoadVariants);
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AddCase(FlatSubdwordLoadsApplyByteOffset);
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cases.push_back(GlobalLoadShortD16Captured(32));
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cases.push_back(GlobalLoadShortD16Captured(64));
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AddCase(FlatLoadShortD16AddressSegments);
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AddCase(FlatVirtualAddressRebasesGuestAllocation);
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AddCase(GlobalSignedImmediateRebasesBeforeSaddr);
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AddCase(FlatSegmentIgnoresSaddrAndMasksOffsetMsb);
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@ -40007,6 +40094,18 @@ int main(int argc, char **argv) {
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}
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return 0;
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}
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if (argc == 2 && std::strcmp(argv[1], "--flat-d16-only") == 0) {
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VulkanHarness vulkan;
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RunCase(&vulkan, GlobalLoadShortD16Captured(32));
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RunCase(&vulkan, GlobalLoadShortD16Captured(64));
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RunCase(&vulkan, FlatLoadShortD16AddressSegments());
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RunCase(&vulkan, FlatSubdwordLoadsApplyByteOffset());
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RunCase(&vulkan, FlatVirtualAddressRebasesGuestAllocation());
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RunCase(&vulkan, GlobalSignedImmediateRebasesBeforeSaddr());
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RunCase(&vulkan, FlatSegmentIgnoresSaddrAndMasksOffsetMsb());
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RunCase(&vulkan, ScratchIsPrivatePerInvocation());
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return 0;
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}
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if (argc == 2 && std::strcmp(argv[1], "--indirect-buffer-only") == 0) {
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VulkanHarness vulkan;
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RunCase(&vulkan, ScalarBufferFromLoopReadlane(32));
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