19fc0274de
shader: validate shared terminal paths in selections
2026-09-07 06:57:55 +04:00
1fd07c2c83
shader: assemble point inputs for merged geometry shaders
2026-09-07 05:04:15 +04:00
ced73c56cc
shader: fix spilled mesh shader data loads
2026-09-06 17:17:51 +04:00
533176f9ff
shader: drop inactive pixel values under whole-quad masks
2026-09-06 14:38:32 +04:00
99a87bd65b
shader: keep loop branches during selection routing
2026-09-06 10:23:44 +04:00
f9f8e12c35
shader: add viewport-index exports and indexed raster state
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Co-authored-by: Ettore Sartori <85788613+Ekt0re@users.noreply.github.com>
2026-09-06 10:16:38 +04:00
b346f58b73
shader: read sample IDs from pixel ancillary input
2026-09-06 06:54:38 +04:00
cf0cbee02d
shader: fix vertex attribute identity swizzles
2026-09-06 05:47:20 +04:00
dda628ca81
render: simplify command and resource ownership
2026-09-06 04:05:35 +04:00
81a5dd612f
shader: fix embedded vertex fetch swizzles
2026-09-05 16:00:46 +04:00
9c00c7077b
shader: keep per-invocation mesh exports out of shared memory
2026-09-05 15:48:29 +04:00
9918dc2591
render: set merged GS user data from shader registers
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Co-authored-by: shadowbeat070 <70843316+shadowbeat070@users.noreply.github.com>
2026-09-05 15:08:20 +04:00
3ab372ccec
render: build indexed triangles for merged ES/GS shaders
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Co-authored-by: shadowbeat070 <70843316+shadowbeat070@users.noreply.github.com>
2026-09-05 14:59:28 +04:00
ebe0979563
shader: share runtime value checks
2026-09-05 13:16:54 +04:00
bec7c510c2
render: use native clears for stencil fill shaders
2026-09-05 12:36:13 +04:00
b96a30ed88
shader: keep fragment layer values under lane masks
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Co-authored-by: shadowbeat070 <70843316+shadowbeat070@users.noreply.github.com>
2026-09-05 11:43:49 +04:00
2ec0e9e8f3
shader: fix packed image address reads
2026-09-05 11:32:32 +04:00
51afce3a97
shader: zero-extend unsigned SOPK comparisons
2026-09-05 10:38:29 +04:00
251f6d6121
shader: fix returns and descriptor placement
2026-09-05 08:54:35 +04:00
3213934d42
shader: run merged geometry stages as mesh shaders
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Co-authored-by: Brandon Strong <brandostrong@gmail.com>
Co-authored-by: fxpw <fxpw@outlook.com>
Co-authored-by: shadowbeat070 <70843316+shadowbeat070@users.noreply.github.com>
2026-09-05 08:32:23 +04:00
bd401a1407
shader: ignore inactive auxiliary position exports
2026-09-04 07:42:23 +02:00
2fe5c150bc
shader: implement BUFFER_ATOMIC_CMPSWAP ( #357 )
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shader: implement RDNA2 buffer atomic compare swap
Co-authored-by: nmzik <Nmzik@mail.ru>
2026-09-03 23:34:34 +02:00
b3c8f91a84
graphics: implement RDNA2 buffer atomic swap x2
2026-09-03 10:17:04 +02:00
c78a5a9fdf
graphics: unify atomic feature and width handling
2026-09-03 05:45:45 +02:00
858c18468b
graphics: implement RDNA2 buffer atomic OR x2
2026-09-03 05:39:05 +02:00
98200fed19
shader: rework resource specialization and optimize pipeline caching
2026-09-03 03:04:17 +02:00
5c86f894be
shader: simplify typed image bindings
2026-09-02 15:45:16 +02:00
86e3c90e32
shader: simplify image resource semantics
2026-09-02 15:45:15 +02:00
0c4dfd565e
renderer: emulate clip-disabled screen-space positions
2026-09-01 21:39:11 +04:00
e591a66b67
Revert "shader: preserve raw VCC bits in S_MOV_B64 ( #418 )"
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This reverts commit 6758d67942
2026-09-01 07:50:37 +04:00
1342c6f1e1
shader: took fixes from PR 427
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- apply c8f34f9's ResourceTracking portability fix
- complete V_CMP_LT_U64 and S_FLBIT_I32_B32 support
- add the sceAmprCommandBufferWaitOnAddress NID from f625a47
- add decoder and compute tests for both shader operations
Co-authored-by: Mac <me@itsmemac.com>
2026-08-31 23:49:21 +04:00
1df06e230d
guest_gpu: remove stale PS4/GCN era gpu registers
2026-08-31 20:58:35 +04:00
66ca225c76
shader: require explicit recompiler resource data
2026-08-31 10:26:08 +04:00
af8aecfdde
shader: remove recompiler error-string propagation
2026-08-31 05:31:41 +04:00
6758d67942
shader: preserve raw VCC bits in S_MOV_B64 ( #418 )
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* shader: preserve raw VCC bits in S_MOV_B64
* fix(shader): centralize scalar U64 mask provenance
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Co-authored-by: nmzik <Nmzik@mail.ru>
2026-08-31 03:04:16 +04:00
9992ab18fc
shader: preserve untouched half in VOP1 B16 writes ( #370 )
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shader: preserve native 16-bit destinations
Co-authored-by: nmzik <Nmzik@mail.ru>
2026-08-30 19:33:26 +04:00
18af08460f
shader: take the high half per lane in V_PK_FMAC_F16 ( #404 )
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Co-authored-by: nmzik <Nmzik@mail.ru>
2026-08-30 15:08:22 +04:00
39ee9972b8
shader: V_CMPX_CLASS_F32
2026-08-30 14:32:07 +04:00
ff61c1cecd
shader: implement V_SIN_F16 ( #399 )
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Co-authored-by: nmzik <Nmzik@mail.ru>
2026-08-30 01:32:49 +04:00
1a87cfedb5
shader: implement V_COS_F16
2026-08-29 19:23:19 +04:00
5bd447d2a2
shader: implement DS_BPERMUTE_B32
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Co-authored-by: Techx3 <56268269+Techx3@users.noreply.github.com>
2026-08-29 19:23:19 +04:00
fcc9dff5b9
shader: DS_WRITE_B16_D16_HI
2026-08-29 14:40:13 +04:00
d9ae3ed64c
shader: V_FFBH_I32
2026-08-29 14:03:57 +04:00
dca7ece2ca
shader: legalize 1D level-zero gathers
2026-08-29 13:32:20 +04:00
53a59434d8
shader: implement V_CMP_EQ_U64
2026-08-29 11:26:05 +04:00
18b6c9059b
shader: support DS_READ_U16_D16_HI ( #356 )
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Decode the high-half D16 LDS read and route it through the existing unsigned-short load lowering. Represent the destination as a high-half partial write so the low 16 bits of the VGPR remain intact. Add captured-instruction decode coverage and a Vulkan execution regression that verifies the preserved half.
Co-authored-by: SueryRD <the.ai.tester2@gmail.com>
2026-08-29 10:39:45 +04:00
b02eb28fd1
shader: support SDWA byte left-shift counts
2026-08-29 10:03:13 +04:00
07f1e77d23
shader: support SDWA byte shift counts
2026-08-29 10:03:13 +04:00
c167375fe1
shader: centralize program compilation and permutation caching
2026-08-27 13:37:46 +02:00
e738535294
graphics: add RDNA2 FLAT BDA buffer cache and faults
2026-08-27 03:45:41 +02:00
nmzik
GodsWill Dev
nomolao2-cell
Brandon Strong
Mehmet Cambaz